From 0d884d3f508e7c79d8b3e0c7170ca5c9ad89ced8 Mon Sep 17 00:00:00 2001
From: Oliver Anderson <oliver.anderson@cyberus-technology.de>
Date: Fri, 21 Nov 2025 15:15:33 +0100
Subject: [PATCH] arch: Mask (out) extended AMX features

The Intel Granite Rapids processors include more AMX related features
that are advertised in leaf 0x7 subleaf 0x1. If the VM is not
configured to support AMX (the default) then these feature bits need
to be masked out.

Furthermore Tile information and TMUL information
in leaves 0x1d and 0x1e respectively are also purely related to AMX
and should also be zeroed whenever AMX support is disabled.

Signed-off-by: Oliver Anderson <oliver.anderson@cyberus-technology.de>
On-behalf-of: SAP <oliver.anderson@sap.com>
---
 arch/src/x86_64/mod.rs | 32 ++++++++++++++++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/arch/src/x86_64/mod.rs b/arch/src/x86_64/mod.rs
index ab3835993..17bae5f5a 100644
--- a/arch/src/x86_64/mod.rs
+++ b/arch/src/x86_64/mod.rs
@@ -50,6 +50,9 @@ const AMX_BF16: u8 = 22; // AMX tile computation on bfloat16 numbers
 const AMX_TILE: u8 = 24; // AMX tile load/store instructions
 const AMX_INT8: u8 = 25; // AMX tile computation on 8-bit integers
 
+const AMX_FP16: u8 = 21; // AMX tile computation on fp16 numbers
+const AMX_COMPLEX: u8 = 8; // AMX tile computation on complex numbers
+
 // KVM feature bits
 #[cfg(feature = "tdx")]
 const KVM_FEATURE_CLOCKSOURCE_BIT: u8 = 0;
@@ -638,8 +641,14 @@ pub fn generate_common_cpuid(
         match entry.function {
             // Clear AMX related bits if the AMX feature is not enabled
             0x7 => {
-                if !config.amx && entry.index == 0 {
-                    entry.edx &= !((1 << AMX_BF16) | (1 << AMX_TILE) | (1 << AMX_INT8));
+                if !config.amx {
+                    if entry.index == 0 {
+                        entry.edx &= !((1 << AMX_BF16) | (1 << AMX_TILE) | (1 << AMX_INT8));
+                    }
+                    if entry.index == 1 {
+                        entry.eax &= !(1 << AMX_FP16);
+                        entry.edx &= !(1 << AMX_COMPLEX);
+                    }
                 }
             }
             0xd =>
@@ -661,6 +670,25 @@ pub fn generate_common_cpuid(
                     }
                 }
             }
+            0x1d => {
+                // Tile Information (purely AMX related).
+                if !config.amx {
+                    entry.eax = 0;
+                    entry.ebx = 0;
+                    entry.ecx = 0;
+                    entry.edx = 0;
+                }
+            }
+            0x1e => {
+                // TMUL information (purely AMX related)
+                if !config.amx {
+                    entry.eax = 0;
+                    entry.ebx = 0;
+                    entry.ecx = 0;
+                    entry.edx = 0;
+                }
+            }
+
             // Copy host L1 cache details if not populated by KVM
             0x8000_0005 => {
                 if entry.eax == 0 && entry.ebx == 0 && entry.ecx == 0 && entry.edx == 0 {