diff --git a/hypervisor/src/arch/x86/emulator/instructions/mod.rs b/hypervisor/src/arch/x86/emulator/instructions/mod.rs index bc2afdeb1..ca79cf496 100644 --- a/hypervisor/src/arch/x86/emulator/instructions/mod.rs +++ b/hypervisor/src/arch/x86/emulator/instructions/mod.rs @@ -77,3 +77,9 @@ impl Default for InstructionMap { Self::new() } } + +macro_rules! insn_add { + ($insn_map:ident, $mnemonic:ident, $code:ident) => { + $insn_map.add_insn(Code::$code, Box::new($mnemonic::$code {})); + }; +} diff --git a/hypervisor/src/arch/x86/emulator/mod.rs b/hypervisor/src/arch/x86/emulator/mod.rs index 5aea661bf..7fd84ffa5 100644 --- a/hypervisor/src/arch/x86/emulator/mod.rs +++ b/hypervisor/src/arch/x86/emulator/mod.rs @@ -13,6 +13,7 @@ use crate::x86_64::{SegmentRegister, SpecialRegisters, StandardRegisters}; use iced_x86::*; use std::sync::{Arc, Mutex}; +#[macro_use] mod instructions; /// CpuStateManager manages an x86 CPU state. @@ -357,6 +358,24 @@ impl Emulator { pub fn new(platform: Arc>>) -> Emulator { let mut insn_map = InstructionMap::::new(); + // MOV + insn_add!(insn_map, mov, Mov_r8_imm8); + insn_add!(insn_map, mov, Mov_r8_rm8); + insn_add!(insn_map, mov, Mov_r16_imm16); + insn_add!(insn_map, mov, Mov_r16_rm16); + insn_add!(insn_map, mov, Mov_r32_imm32); + insn_add!(insn_map, mov, Mov_r32_rm32); + insn_add!(insn_map, mov, Mov_r64_imm64); + insn_add!(insn_map, mov, Mov_r64_rm64); + insn_add!(insn_map, mov, Mov_rm8_imm8); + insn_add!(insn_map, mov, Mov_rm8_r8); + insn_add!(insn_map, mov, Mov_rm16_imm16); + insn_add!(insn_map, mov, Mov_rm16_r16); + insn_add!(insn_map, mov, Mov_rm32_imm32); + insn_add!(insn_map, mov, Mov_rm32_r32); + insn_add!(insn_map, mov, Mov_rm64_imm32); + insn_add!(insn_map, mov, Mov_rm64_r64); + Emulator { platform: Arc::clone(&platform), insn_map,