From 2b06ce0ed40b81bbef551ff9150f09bc105164d5 Mon Sep 17 00:00:00 2001 From: Sebastien Boeuf Date: Wed, 8 Jul 2020 14:27:42 +0200 Subject: [PATCH] vmm: Add EPC device to ACPI tables The SGX EPC region must be exposed through the ACPI tables so that the guest can detect its presence. The guest only get the full range from ACPI, as the specific EPC sections are directly described through the CPUID of each vCPU. Signed-off-by: Sebastien Boeuf --- vmm/src/memory_manager.rs | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/vmm/src/memory_manager.rs b/vmm/src/memory_manager.rs index ac57dea55..cebedbcec 100644 --- a/vmm/src/memory_manager.rs +++ b/vmm/src/memory_manager.rs @@ -1289,6 +1289,40 @@ impl Aml for MemoryManager { .to_aml_bytes(), ); + #[cfg(target_arch = "x86_64")] + { + if let Some(sgx_epc_region) = &self.sgx_epc_region { + let min = sgx_epc_region.start().raw_value() as u64; + let max = min + sgx_epc_region.size() as u64 - 1; + // SGX EPC region + bytes.extend_from_slice( + &aml::Device::new( + "_SB_.EPC_".into(), + vec![ + &aml::Name::new("_HID".into(), &aml::EISAName::new("INT0E0C")), + // QWORD describing the EPC region start and size + &aml::Name::new( + "_CRS".into(), + &aml::ResourceTemplate::new(vec![&aml::AddressSpace::new_memory( + aml::AddressSpaceCachable::NotCacheable, + true, + min, + max, + )]), + ), + &aml::Method::new( + "_STA".into(), + 0, + false, + vec![&aml::Return::new(&0xfu8)], + ), + ], + ) + .to_aml_bytes(), + ); + } + } + bytes } }