From 519476e8424b302f852c45e9f3d5535ef3ded2a7 Mon Sep 17 00:00:00 2001 From: Wei Liu Date: Fri, 28 Jun 2024 03:27:13 +0000 Subject: [PATCH] hypervisor: mshv: relax the requirement for instruction emulation Previously we required the hypervisor to give us a valid instruction stream. That worked well enough because we never hit any edge conditions (such as when the instruction stream crosses page boundary). Now that MSHV can deal with partial or empty instruction stream, we can remove that requirement. Signed-off-by: Wei Liu --- hypervisor/src/mshv/mod.rs | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hypervisor/src/mshv/mod.rs b/hypervisor/src/mshv/mod.rs index 3f01fe239..5560a926b 100644 --- a/hypervisor/src/mshv/mod.rs +++ b/hypervisor/src/mshv/mod.rs @@ -641,7 +641,6 @@ impl cpu::Vcpu for MshvVcpu { hv_message_type_HVMSG_UNMAPPED_GPA => { let info = x.to_memory_info().unwrap(); let insn_len = info.instruction_byte_count as usize; - assert!(insn_len > 0 && insn_len <= 16); let mut context = MshvEmulatorContext { vcpu: self, @@ -653,7 +652,10 @@ impl cpu::Vcpu for MshvVcpu { // Emulate the trapped instruction, and only the first one. let new_state = emul - .emulate_first_insn(self.vp_index as usize, &info.instruction_bytes) + .emulate_first_insn( + self.vp_index as usize, + &info.instruction_bytes[..insn_len], + ) .map_err(|e| cpu::HypervisorCpuError::RunVcpu(e.into()))?; // Set CPU state back.