From 5fc12862e6880322392636bb691ec4c1ffed0486 Mon Sep 17 00:00:00 2001 From: Wei Liu Date: Mon, 11 Jan 2021 17:38:48 +0000 Subject: [PATCH] hypervisor, vmm: minor changes to VmmOps Swap the last two parameters of guest_mem_{read,write} to be consistent with other read / write functions. Use more descriptive parameter names. No functional change. Signed-off-by: Wei Liu --- hypervisor/src/vm.rs | 12 ++++++------ vmm/src/vm.rs | 30 +++++++++++++++--------------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/hypervisor/src/vm.rs b/hypervisor/src/vm.rs index d26377ad6..51a0436b8 100644 --- a/hypervisor/src/vm.rs +++ b/hypervisor/src/vm.rs @@ -238,12 +238,12 @@ pub trait Vm: Send + Sync { } pub trait VmmOps: Send + Sync { - fn guest_mem_write(&self, buf: &[u8], gpa: u64) -> Result; - fn guest_mem_read(&self, buf: &mut [u8], gpa: u64) -> Result; - fn mmio_read(&self, addr: u64, data: &mut [u8]) -> Result<()>; - fn mmio_write(&self, addr: u64, data: &[u8]) -> Result<()>; + fn guest_mem_write(&self, gpa: u64, buf: &[u8]) -> Result; + fn guest_mem_read(&self, gpa: u64, buf: &mut [u8]) -> Result; + fn mmio_read(&self, gpa: u64, data: &mut [u8]) -> Result<()>; + fn mmio_write(&self, gpa: u64, data: &[u8]) -> Result<()>; #[cfg(target_arch = "x86_64")] - fn pio_read(&self, addr: u64, data: &mut [u8]) -> Result<()>; + fn pio_read(&self, port: u64, data: &mut [u8]) -> Result<()>; #[cfg(target_arch = "x86_64")] - fn pio_write(&self, addr: u64, data: &[u8]) -> Result<()>; + fn pio_write(&self, port: u64, data: &[u8]) -> Result<()>; } diff --git a/vmm/src/vm.rs b/vmm/src/vm.rs index 998c606ee..0f3e67487 100644 --- a/vmm/src/vm.rs +++ b/vmm/src/vm.rs @@ -392,34 +392,34 @@ impl VmOps { } impl VmmOps for VmOps { - fn guest_mem_write(&self, buf: &[u8], gpa: u64) -> hypervisor::vm::Result { + fn guest_mem_write(&self, gpa: u64, buf: &[u8]) -> hypervisor::vm::Result { self.memory .memory() .write(buf, GuestAddress(gpa)) .map_err(|e| HypervisorVmError::GuestMemWrite(e.into())) } - fn guest_mem_read(&self, buf: &mut [u8], gpa: u64) -> hypervisor::vm::Result { + fn guest_mem_read(&self, gpa: u64, buf: &mut [u8]) -> hypervisor::vm::Result { self.memory .memory() .read(buf, GuestAddress(gpa)) .map_err(|e| HypervisorVmError::GuestMemRead(e.into())) } - fn mmio_read(&self, addr: u64, data: &mut [u8]) -> hypervisor::vm::Result<()> { - if let Err(e) = self.mmio_bus.read(addr, data) { + fn mmio_read(&self, gpa: u64, data: &mut [u8]) -> hypervisor::vm::Result<()> { + if let Err(e) = self.mmio_bus.read(gpa, data) { if let vm_device::BusError::MissingAddressRange = e { - warn!("Guest MMIO read to unregistered address 0x{:x}", addr); + warn!("Guest MMIO read to unregistered address 0x{:x}", gpa); } } Ok(()) } - fn mmio_write(&self, addr: u64, data: &[u8]) -> hypervisor::vm::Result<()> { - match self.mmio_bus.write(addr, data) { + fn mmio_write(&self, gpa: u64, data: &[u8]) -> hypervisor::vm::Result<()> { + match self.mmio_bus.write(gpa, data) { Err(e) => { if let vm_device::BusError::MissingAddressRange = e { - warn!("Guest MMIO write to unregistered address 0x{:x}", addr); + warn!("Guest MMIO write to unregistered address 0x{:x}", gpa); } } Ok(Some(barrier)) => { @@ -433,26 +433,26 @@ impl VmmOps for VmOps { } #[cfg(target_arch = "x86_64")] - fn pio_read(&self, addr: u64, data: &mut [u8]) -> hypervisor::vm::Result<()> { - if let Err(e) = self.io_bus.read(addr, data) { + fn pio_read(&self, port: u64, data: &mut [u8]) -> hypervisor::vm::Result<()> { + if let Err(e) = self.io_bus.read(port, data) { if let vm_device::BusError::MissingAddressRange = e { - warn!("Guest PIO read to unregistered address 0x{:x}", addr); + warn!("Guest PIO read to unregistered address 0x{:x}", port); } } Ok(()) } #[cfg(target_arch = "x86_64")] - fn pio_write(&self, addr: u64, data: &[u8]) -> hypervisor::vm::Result<()> { - if addr == DEBUG_IOPORT as u64 && data.len() == 1 { + fn pio_write(&self, port: u64, data: &[u8]) -> hypervisor::vm::Result<()> { + if port == DEBUG_IOPORT as u64 && data.len() == 1 { self.log_debug_ioport(data[0]); return Ok(()); } - match self.io_bus.write(addr, data) { + match self.io_bus.write(port, data) { Err(e) => { if let vm_device::BusError::MissingAddressRange = e { - warn!("Guest PIO write to unregistered address 0x{:x}", addr); + warn!("Guest PIO write to unregistered address 0x{:x}", port); } } Ok(Some(barrier)) => {