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vmm: Add MSI-X support to virtio-pci devices

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In order to allow virtio-pci devices to use MSI-X messages instead
of legacy pin based interrupts, this patch implements the MSI-X
support for cloud-hypervisor. The VMM code and virtio-pci bits have
been modified based on the "msix" module previously added to the pci
crate.

Fixes #12

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
This commit is contained in:
Sebastien Boeuf 2019-05-29 16:33:29 -07:00 • committed by Rob Bradford
parent 13a065d2cd
commit 8df05b72dc
6 changed files with 148 additions and 36 deletions
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14
pci/src/device.rs
View file

@ -3,6 +3,7 @@
// found in the LICENSE-BSD-3-Clause file.
use crate::configuration::{self, PciConfiguration};
use crate::msix::MsixTableEntry;
use crate::PciInterruptPin;
use devices::BusDevice;
use std;
@ -13,6 +14,8 @@ use vm_memory::{GuestAddress, GuestUsize};
use vmm_sys_util::EventFd;
pub type IrqClosure = Box<Fn() -> std::result::Result<(), std::io::Error> + Send + Sync>;
pub type MsixClosure =
Box<Fn(MsixTableEntry) -> std::result::Result<(), std::io::Error> + Send + Sync>;
#[derive(Debug)]
pub enum Error {
@ -44,7 +47,16 @@ impl Display for Error {
pub trait PciDevice: BusDevice {
/// Assign a legacy PCI IRQ to this device.
/// The device may write to `irq_evt` to trigger an interrupt.
fn assign_irq(&mut self, _irq_cb: Arc<IrqClosure>, _irq_num: u32, _irq_pin: PciInterruptPin) {}
fn assign_pin_irq(
&mut self,
_irq_cb: Arc<IrqClosure>,
_irq_num: u32,
_irq_pin: PciInterruptPin,
) {
}
/// Assign MSI-X to this device.
fn assign_msix(&mut self, _msi_cb: Arc<MsixClosure>) {}
/// Allocates the needed PCI BARs space using the `allocate` function which takes a size and
/// returns an address. Returns a Vec of (GuestAddress, GuestUsize) tuples.

4
pci/src/lib.rs
View file

@ -12,6 +12,7 @@ extern crate vmm_sys_util;
mod configuration;
mod device;
mod msix;
mod root;
pub use self::configuration::{
@ -20,7 +21,8 @@ pub use self::configuration::{
PciSubclass,
};
pub use self::device::Error as PciDeviceError;
pub use self::device::{IrqClosure, PciDevice};
pub use self::device::{IrqClosure, MsixClosure, PciDevice};
pub use self::msix::{MsixCap, MsixConfig, MsixTableEntry};
pub use self::root::{PciConfigIo, PciConfigMmio, PciRoot, PciRootError};
/// PCI has four interrupt pins A->D.