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misc: clippy: add semicolon_if_nothing_returned

Browse source 
Signed-off-by: Philipp Schuster <philipp.schuster@cyberus-technology.de>
On-behalf-of: SAP philipp.schuster@sap.com
This commit is contained in:
Philipp Schuster 2025-11-18 12:26:21 +01:00 • committed by Rob Bradford
parent ea4f07d3bf
commit b4c62bf159
64 changed files with 244 additions and 236 deletions
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1
Cargo.toml
View file

@ -171,6 +171,7 @@ suspicious = "deny"
# Individual Lints
assertions_on_result_states = "deny"
semicolon_if_nothing_returned = "deny"
undocumented_unsafe_blocks = "deny"
uninlined_format_args = "deny"
unnecessary_semicolon = "deny"

4
arch/src/x86_64/mod.rs
View file

@ -634,7 +634,7 @@ pub fn generate_common_cpuid(
// Clear AMX related bits if the AMX feature is not enabled
0x7 => {
if !config.amx && entry.index == 0 {
entry.edx &= !((1 << AMX_BF16) | (1 << AMX_TILE) | (1 << AMX_INT8))
entry.edx &= !((1 << AMX_BF16) | (1 << AMX_TILE) | (1 << AMX_INT8));
}
}
0xd =>
@ -701,7 +701,7 @@ pub fn generate_common_cpuid(
| (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)
| (1 << KVM_FEATURE_ASYNC_PF_BIT)
| (1 << KVM_FEATURE_ASYNC_PF_VMEXIT_BIT)
| (1 << KVM_FEATURE_STEAL_TIME_BIT))
| (1 << KVM_FEATURE_STEAL_TIME_BIT));
}
}
_ => {}

4
arch/src/x86_64/tdx/mod.rs
View file

@ -304,7 +304,7 @@ fn align_hob(v: u64) -> u64 {
impl TdHob {
fn update_offset<T>(&mut self) {
self.current_offset = align_hob(self.current_offset + std::mem::size_of::<T>() as u64)
self.current_offset = align_hob(self.current_offset + std::mem::size_of::<T>() as u64);
}
pub fn start(offset: u64) -> TdHob {
@ -528,7 +528,7 @@ mod unit_tests {
let mut f = std::fs::File::open("tdvf.fd").unwrap();
let (sections, _) = parse_tdvf_sections(&mut f).unwrap();
for section in sections {
eprintln!("{section:x?}")
eprintln!("{section:x?}");
}
}
}

8
block/src/lib.rs
View file

@ -122,7 +122,7 @@ pub fn build_serial(disk_path: &Path) -> Vec<u8> {
// This will also zero out any leftover bytes.
let disk_id = m.as_bytes();
let bytes_to_copy = cmp::min(disk_id.len(), VIRTIO_BLK_ID_BYTES as usize);
default_serial[..bytes_to_copy].clone_from_slice(&disk_id[..bytes_to_copy])
default_serial[..bytes_to_copy].clone_from_slice(&disk_id[..bytes_to_copy]);
}
}
default_serial
@ -563,7 +563,7 @@ impl Request {
aligned_operation.aligned_ptr as *const u8,
aligned_operation.origin_ptr as *mut u8,
aligned_operation.size,
)
);
};
}
@ -574,7 +574,7 @@ impl Request {
dealloc(
aligned_operation.aligned_ptr as *mut u8,
aligned_operation.layout,
)
);
};
}
@ -582,7 +582,7 @@ impl Request {
}
pub fn set_writeback(&mut self, writeback: bool) {
self.writeback = writeback
self.writeback = writeback;
}
}

10
block/src/raw_async.rs
View file

@ -97,7 +97,7 @@ impl AsyncIo for RawFileAsync {
.build()
.user_data(user_data),
)
.map_err(|_| AsyncIoError::ReadVectored(Error::other("Submission queue is full")))?
.map_err(|_| AsyncIoError::ReadVectored(Error::other("Submission queue is full")))?;
};
// Update the submission queue and submit new operations to the
@ -125,7 +125,7 @@ impl AsyncIo for RawFileAsync {
.build()
.user_data(user_data),
)
.map_err(|_| AsyncIoError::WriteVectored(Error::other("Submission queue is full")))?
.map_err(|_| AsyncIoError::WriteVectored(Error::other("Submission queue is full")))?;
};
// Update the submission queue and submit new operations to the
@ -147,7 +147,7 @@ impl AsyncIo for RawFileAsync {
.build()
.user_data(user_data),
)
.map_err(|_| AsyncIoError::Fsync(Error::other("Submission queue is full")))?
.map_err(|_| AsyncIoError::Fsync(Error::other("Submission queue is full")))?;
};
// Update the submission queue and submit new operations to the
@ -199,7 +199,7 @@ impl AsyncIo for RawFileAsync {
)
.map_err(|_| {
AsyncIoError::ReadVectored(Error::other("Submission queue is full"))
})?
})?;
};
submitted = true;
}
@ -219,7 +219,7 @@ impl AsyncIo for RawFileAsync {
)
.map_err(|_| {
AsyncIoError::WriteVectored(Error::other("Submission queue is full"))
})?
})?;
};
submitted = true;
}

4
devices/src/acpi.rs
View file

@ -44,7 +44,7 @@ impl AcpiShutdownDevice {
impl BusDevice for AcpiShutdownDevice {
// Spec has all fields as zero
fn read(&mut self, _base: u64, _offset: u64, data: &mut [u8]) {
data.fill(0)
data.fill(0);
}
fn write(&mut self, _base: u64, _offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
@ -213,7 +213,7 @@ impl Aml for AcpiGedDevice {
),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}

2
devices/src/ivshmem.rs
View file

@ -209,7 +209,7 @@ impl IvshmemDevice {
impl BusDevice for IvshmemDevice {
fn read(&mut self, base: u64, offset: u64, data: &mut [u8]) {
self.read_bar(base, offset, data)
self.read_bar(base, offset, data);
}
fn write(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {

2
devices/src/legacy/cmos.rs
View file

@ -87,7 +87,7 @@ impl BusDevice for Cmos {
}
}
} else {
self.data[(self.index & INDEX_MASK) as usize] = data[0]
self.data[(self.index & INDEX_MASK) as usize] = data[0];
}
}
o => warn!("bad write offset on CMOS device: {o}"),

2
devices/src/legacy/debug_port.rs
View file

@ -62,7 +62,7 @@ impl DebugPort {
impl BusDevice for DebugPort {
fn read(&mut self, _base: u64, _offset: u64, _data: &mut [u8]) {
error!("Invalid read to debug port")
error!("Invalid read to debug port");
}
fn write(

6
devices/src/legacy/fw_cfg.rs
View file

@ -442,7 +442,7 @@ impl FwCfg {
fw_cfg_item_list: Option<Vec<FwCfgItem>>,
) -> Result<()> {
if let Some(mem_size) = mem_size {
self.add_e820(mem_size)?
self.add_e820(mem_size)?;
}
if let Some(kernel) = kernel {
self.add_kernel_data(&kernel)?;
@ -451,7 +451,7 @@ impl FwCfg {
self.add_kernel_cmdline(cmdline);
}
if let Some(initramfs) = initramfs {
self.add_initramfs_data(&initramfs)?
self.add_initramfs_data(&initramfs)?;
}
if let Some(fw_cfg_item_list) = fw_cfg_item_list {
for item in fw_cfg_item_list {
@ -626,7 +626,7 @@ impl FwCfg {
&access_resp.0.to_be_bytes(),
GuestAddress(dma_address + core::mem::offset_of!(FwCfgDmaAccess, control_be) as u64),
) {
error!("fw_cfg: finishing dma: {e:?}")
error!("fw_cfg: finishing dma: {e:?}");
}
}

6
devices/src/legacy/fwdebug.rs
View file

@ -26,9 +26,9 @@ impl BusDevice for FwDebugDevice {
/// Upon read return the magic value to indicate that there is a debug port
fn read(&mut self, _base: u64, _offset: u64, data: &mut [u8]) {
if data.len() == 1 {
data[0] = 0xe9
data[0] = 0xe9;
} else {
error!("Invalid read size on debug port: {}", data.len())
error!("Invalid read size on debug port: {}", data.len());
}
}
@ -36,7 +36,7 @@ impl BusDevice for FwDebugDevice {
if data.len() == 1 {
print!("{}", data[0] as char);
} else {
error!("Invalid write size on debug port: {}", data.len())
error!("Invalid write size on debug port: {}", data.len());
}
None

2
devices/src/legacy/gpio_pl061.rs
View file

@ -261,7 +261,7 @@ impl BusDevice for Gpio {
let index = ((offset - GPIO_ID_LOW) >> 2) as usize;
value = u32::from(GPIO_ID[index]);
} else if offset < OFS_DATA {
value = self.data & ((offset >> 2) as u32)
value = self.data & ((offset >> 2) as u32);
} else {
value = match offset {
GPIODIR => self.dir,

8
devices/src/legacy/serial.rs
View file

@ -215,7 +215,7 @@ impl Serial {
fn thr_empty(&mut self) -> Result<()> {
if self.is_thr_intr_enabled() {
self.add_intr_bit(IIR_THR_BIT);
self.trigger_interrupt()?
self.trigger_interrupt()?;
}
Ok(())
}
@ -223,7 +223,7 @@ impl Serial {
fn recv_data(&mut self) -> Result<()> {
if self.is_recv_intr_enabled() {
self.add_intr_bit(IIR_RECV_BIT);
self.trigger_interrupt()?
self.trigger_interrupt()?;
}
self.line_status |= LSR_DATA_BIT;
Ok(())
@ -240,10 +240,10 @@ impl Serial {
fn handle_write(&mut self, offset: u8, v: u8) -> Result<()> {
match offset {
DLAB_LOW if self.is_dlab_set() => {
self.baud_divisor = (self.baud_divisor & 0xff00) | u16::from(v)
self.baud_divisor = (self.baud_divisor & 0xff00) | u16::from(v);
}
DLAB_HIGH if self.is_dlab_set() => {
self.baud_divisor = (self.baud_divisor & 0x00ff) | ((u16::from(v)) << 8)
self.baud_divisor = (self.baud_divisor & 0x00ff) | ((u16::from(v)) << 8);
}
DATA => {
if self.is_loop() {

12
devices/src/pvmemcontrol.rs
View file

@ -390,7 +390,7 @@ impl PvmemcontrolDevice {
.iter()
.skip(offset as usize)
.zip(data.iter_mut())
.for_each(|(src, dest)| *dest = *src)
.for_each(|(src, dest)| *dest = *src);
}
/// can only write to transport payload
@ -402,7 +402,7 @@ impl PvmemcontrolDevice {
.iter_mut()
.skip(offset as usize)
.zip(data.iter())
.for_each(|(dest, src)| *dest = *src)
.for_each(|(dest, src)| *dest = *src);
}
fn find_connection(&self, conn: GuestConnection) -> Option<GuestAddress> {
@ -650,13 +650,13 @@ impl PvmemcontrolBusDevice {
.ok_or(Error::InvalidConnection(conn.command))
})
.map(|gpa| self.handle_pvmemcontrol_request(gpa))
.unwrap_or_else(|err| warn!("{:?}", err));
.unwrap_or_else(|err| warn!("{err:?}"));
}
}
}
fn handle_guest_read(&self, offset: u64, data: &mut [u8]) {
self.dev.read().unwrap().read_transport(offset, data)
self.dev.read().unwrap().read_transport(offset, data);
}
}
@ -760,7 +760,7 @@ impl PciDevice for PvmemcontrolPciDevice {
_mmio64_allocator: &mut AddressAllocator,
) -> Result<(), PciDeviceError> {
for bar in self.bar_regions.drain(..) {
mmio32_allocator.free(GuestAddress(bar.addr()), bar.size())
mmio32_allocator.free(GuestAddress(bar.addr()), bar.size());
}
Ok(())
}
@ -805,7 +805,7 @@ impl Migratable for PvmemcontrolPciDevice {}
impl BusDeviceSync for PvmemcontrolBusDevice {
fn read(&self, _base: u64, offset: u64, data: &mut [u8]) {
self.handle_guest_read(offset, data)
self.handle_guest_read(offset, data);
}
fn write(&self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {

2
devices/src/pvpanic.rs
View file

@ -141,7 +141,7 @@ impl PvPanicDevice {
impl BusDevice for PvPanicDevice {
fn read(&mut self, base: u64, offset: u64, data: &mut [u8]) {
self.read_bar(base, offset, data)
self.read_bar(base, offset, data);
}
fn write(&mut self, _base: u64, _offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {

2
hypervisor/src/arch/aarch64/gic.rs
View file

@ -66,7 +66,7 @@ impl<'de> Deserialize<'de> for GicState {
assert!(
std::mem::size_of::<GicStateDefaultDeserialize>()
== std::mem::size_of::<GicState>()
)
);
};
let value: serde_json::Value = Deserialize::deserialize(deserializer)?;

4
hypervisor/src/arch/x86/emulator/instructions/mov.rs
View file

@ -699,7 +699,7 @@ mod unit_tests {
}
for (register, instruction_prefix) in test_inputs {
helper(register, instruction_prefix)
helper(register, instruction_prefix);
}
}
@ -760,7 +760,7 @@ mod unit_tests {
}
for (register, instruction_prefix) in test_inputs {
helper(register, instruction_prefix)
helper(register, instruction_prefix);
}
}
}

6
hypervisor/src/arch/x86/emulator/mod.rs
View file

@ -167,9 +167,9 @@ pub trait CpuStateManager: Clone {
}
if segment_register.db() != 0 {
segment_limit = 0xffffffff
segment_limit = 0xffffffff;
} else {
segment_limit = 0xffff
segment_limit = 0xffff;
}
}
@ -427,7 +427,7 @@ impl CpuStateManager for EmulatorCpuState {
}
fn set_efer(&mut self, efer: u64) {
self.sregs.efer = efer
self.sregs.efer = efer;
}
fn flags(&self) -> u64 {

2
hypervisor/src/arch/x86/mod.rs
View file

@ -296,7 +296,7 @@ impl LapicState {
// Following call can't fail if the offsets defined above are correct.
writer
.write_u32::<LittleEndian>(value)
.expect("Failed to write klapic register")
.expect("Failed to write klapic register");
}
}

2
hypervisor/src/mshv/mod.rs
View file

@ -1399,7 +1399,7 @@ impl cpu::Vcpu for MshvVcpu {
if self.vp_index == 0 {
self.fd
.set_misc_regs(&state.misc)
.map_err(|e| cpu::HypervisorCpuError::SetMiscRegs(e.into()))?
.map_err(|e| cpu::HypervisorCpuError::SetMiscRegs(e.into()))?;
}
self.fd
.set_debug_regs(&state.dbg)

2
net_util/src/ctrl_queue.rs
View file

@ -120,7 +120,7 @@ impl CtrlQueue {
tap.set_offload(virtio_features_to_tap_offload(features))
.map_err(|e| {
error!("Error programming tap offload: {e:?}");
ok = false
ok = false;
})
.ok();
}

4
net_util/src/open_tap.rs
View file

@ -91,9 +91,9 @@ fn open_tap_rx_q_0(
);
}
if let Some(mac) = host_mac {
tap.set_mac_addr(*mac).map_err(Error::TapSetMac)?
tap.set_mac_addr(*mac).map_err(Error::TapSetMac)?;
} else {
*host_mac = Some(tap.get_mac_addr().map_err(Error::TapGetMac)?)
*host_mac = Some(tap.get_mac_addr().map_err(Error::TapGetMac)?);
}
if let Some(mtu) = mtu {
tap.set_mtu(mtu as i32).map_err(Error::TapSetMtu)?;

4
option_parser/src/lib.rs
View file

@ -407,7 +407,7 @@ fn dequote(s: &str) -> String {
} else {
out.push(i);
}
prev_byte = i
prev_byte = i;
}
assert!(!in_quotes, "split_commas didn't reject unbalanced quotes");
// SAFETY: the non-ASCII bytes in the output are the same
@ -515,6 +515,6 @@ mod unit_tests {
#[test]
fn check_dequote() {
assert_eq!(dequote("a\u{3b2}\"a\"\"\""), "a\u{3b2}a\"")
assert_eq!(dequote("a\u{3b2}\"a\"\"\""), "a\u{3b2}a\"");
}
}

14
pci/src/msi.rs
View file

@ -142,8 +142,9 @@ impl MsiCap {
let value = LittleEndian::read_u16(data);
match offset {
MSI_MSG_CTL_OFFSET => {
self.msg_ctl = (self.msg_ctl & !(MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE))
| (value & (MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE))
self.msg_ctl = (self.msg_ctl
& !(MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE))
| (value & (MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE));
}
x if x == msg_data_offset => self.msg_data = value,
_ => error!("invalid offset"),
@ -153,16 +154,17 @@ impl MsiCap {
let value = LittleEndian::read_u32(data);
match offset {
0x0 => {
self.msg_ctl = (self.msg_ctl & !(MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE))
| ((value >> 16) as u16 & (MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE))
self.msg_ctl = (self.msg_ctl
& !(MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE))
| ((value >> 16) as u16 & (MSI_CTL_ENABLE | MSI_CTL_MULTI_MSG_ENABLE));
}
MSI_MSG_ADDR_LO_OFFSET => self.msg_addr_lo = value & MSI_MSG_ADDR_LO_MASK,
x if x == msg_data_offset => self.msg_data = value as u16,
x if addr_hi_offset.is_some() && x == addr_hi_offset.unwrap() => {
self.msg_addr_hi = value
self.msg_addr_hi = value;
}
x if mask_bits_offset.is_some() && x == mask_bits_offset.unwrap() => {
self.mask_bits = value
self.mask_bits = value;
}
_ => error!("invalid offset"),
}

20
pci/src/vfio.rs
View file

@ -238,14 +238,14 @@ impl Interrupt {
fn msix_write_table(&mut self, offset: u64, data: &[u8]) {
if let Some(msix) = &mut self.msix {
let offset = offset - u64::from(msix.cap.table_offset());
msix.bar.write_table(offset, data)
msix.bar.write_table(offset, data);
}
}
fn msix_read_table(&self, offset: u64, data: &mut [u8]) {
if let Some(msix) = &self.msix {
let offset = offset - u64::from(msix.cap.table_offset());
msix.bar.read_table(offset, data)
msix.bar.read_table(offset, data);
}
}
@ -344,7 +344,7 @@ pub(crate) trait Vfio: Send + Sync {
fn write_config_dword(&self, offset: u32, buf: u32) {
let data: [u8; 4] = buf.to_le_bytes();
self.write_config(offset, &data)
self.write_config(offset, &data);
}
fn read_config(&self, offset: u32, data: &mut [u8]) {
@ -352,7 +352,7 @@ pub(crate) trait Vfio: Send + Sync {
}
fn write_config(&self, offset: u32, data: &[u8]) {
self.region_write(VFIO_PCI_CONFIG_REGION_INDEX, offset.into(), data)
self.region_write(VFIO_PCI_CONFIG_REGION_INDEX, offset.into(), data);
}
fn enable_msi(&self, fds: Vec<&EventFd>) -> Result<(), VfioError> {
@ -408,11 +408,11 @@ impl VfioDeviceWrapper {
impl Vfio for VfioDeviceWrapper {
fn region_read(&self, index: u32, offset: u64, data: &mut [u8]) {
self.device.region_read(index, data, offset)
self.device.region_read(index, data, offset);
}
fn region_write(&self, index: u32, offset: u64, data: &[u8]) {
self.device.region_write(index, data, offset)
self.device.region_write(index, data, offset);
}
fn get_irq_info(&self, irq_index: u32) -> Option<VfioIrq> {
@ -641,7 +641,7 @@ impl VfioCommon {
flags & PCI_CONFIG_BAR_PREFETCHABLE,
PCI_CONFIG_BAR_PREFETCHABLE
) {
prefetchable = PciBarPrefetchable::Prefetchable
prefetchable = PciBarPrefetchable::Prefetchable;
}
// To get size write all 1s
@ -1786,7 +1786,7 @@ impl Drop for VfioPciDevice {
if let Some(msi) = &self.common.interrupt.msi
&& msi.cfg.enabled()
{
self.common.disable_msi()
self.common.disable_msi();
}
if self.common.interrupt.intx_in_use() {
@ -1797,7 +1797,7 @@ impl Drop for VfioPciDevice {
impl BusDevice for VfioPciDevice {
fn read(&mut self, base: u64, offset: u64, data: &mut [u8]) {
self.read_bar(base, offset, data)
self.read_bar(base, offset, data);
}
fn write(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
@ -1870,7 +1870,7 @@ impl PciDevice for VfioPciDevice {
}
fn read_bar(&mut self, base: u64, offset: u64, data: &mut [u8]) {
self.common.read_bar(base, offset, data)
self.common.read_bar(base, offset, data);
}
fn write_bar(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {

6
pci/src/vfio_user.rs
View file

@ -274,7 +274,7 @@ impl VfioUserPciDevice {
impl BusDevice for VfioUserPciDevice {
fn read(&mut self, base: u64, offset: u64, data: &mut [u8]) {
self.read_bar(base, offset, data)
self.read_bar(base, offset, data);
}
fn write(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
@ -440,7 +440,7 @@ impl PciDevice for VfioUserPciDevice {
}
fn read_bar(&mut self, base: u64, offset: u64, data: &mut [u8]) {
self.common.read_bar(base, offset, data)
self.common.read_bar(base, offset, data);
}
fn write_bar(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
@ -514,7 +514,7 @@ impl Drop for VfioUserPciDevice {
if let Some(msi) = &self.common.interrupt.msi
&& msi.cfg.enabled()
{
self.common.disable_msi()
self.common.disable_msi();
}
if self.common.interrupt.intx_in_use() {

2
performance-metrics/src/performance_tests.rs
View file

@ -487,7 +487,7 @@ fn measure_restore_time(
\n\n==== Start child stderr ====\n\n{}\n\n==== End child stderr ====",
String::from_utf8_lossy(&output.stdout),
String::from_utf8_lossy(&output.stderr)
)
);
})
}

4
rate_limiter/src/group.rs
View file

@ -72,7 +72,7 @@ impl RateLimiterGroupHandle {
/// Can be used to *manually* add tokens to a bucket. Useful for reverting a
/// `consume()` if needed.
pub fn manual_replenish(&self, tokens: u64, token_type: TokenType) {
self.inner.rate_limiter.manual_replenish(tokens, token_type)
self.inner.rate_limiter.manual_replenish(tokens, token_type);
}
/// This function needs to be called every time there is an event on the
@ -250,7 +250,7 @@ impl RateLimiterGroup {
inner.rate_limiter.event_handler().unwrap();
let handles = inner.handles.lock().unwrap();
for handle in handles.iter() {
handle.write(1).map_err(Error::EventFdWrite)?
handle.write(1).map_err(Error::EventFdWrite)?;
}
}
EpollDispatch::Kill => {

2
rate_limiter/src/lib.rs
View file

@ -300,7 +300,7 @@ impl RateLimiterInner {
self.timer_fd
.reset(dur, None)
.expect("Can't arm the timer (unexpected 'timerfd_settime' failure).");
flag.store(true, Ordering::Relaxed)
flag.store(true, Ordering::Relaxed);
}
}

4
src/main.rs
View file

@ -770,7 +770,7 @@ fn start_vmm(cmd_arguments: ArgMatches) -> Result<Option<String>, Error> {
.map_err(Error::VmmThread)?;
if let Some(api_handle) = vmm_thread_handle.http_api_handle {
http_api_graceful_shutdown(api_handle).map_err(Error::HttpApiShutdown)?
http_api_graceful_shutdown(api_handle).map_err(Error::HttpApiShutdown)?;
}
#[cfg(feature = "dbus_api")]
@ -2010,6 +2010,6 @@ mod unit_tests {
let (default_vcpus, default_memory, default_rng) = prepare_default_values();
let args = get_cli_options_sorted(default_vcpus, default_memory, default_rng);
assert_args_sorted(|| args.iter())
assert_args_sorted(|| args.iter());
}
}

144
tests/integration.rs
View file

@ -874,7 +874,7 @@ impl MetaEvent {
if v["event"].as_str().unwrap() == self.event {
if let Some(device_id) = &self.device_id {
if v["properties"]["id"].as_str().unwrap() == device_id {
matched = true
matched = true;
}
} else {
matched = true;
@ -2028,7 +2028,7 @@ fn _get_vmm_overhead(pid: u32, guest_memory_size: u32) -> HashMap<String, u32> {
let values: Vec<&str> = l.split_whitespace().collect();
region_name = values.last().unwrap().trim().to_string();
if region_name == "0" {
region_name = "anonymous".to_string()
region_name = "anonymous".to_string();
}
}
@ -2509,13 +2509,13 @@ mod common_parallel {
#[test]
#[cfg(target_arch = "x86_64")]
fn test_focal_hypervisor_fw() {
test_simple_launch(fw_path(FwType::RustHypervisorFirmware), FOCAL_IMAGE_NAME)
test_simple_launch(fw_path(FwType::RustHypervisorFirmware), FOCAL_IMAGE_NAME);
}
#[test]
#[cfg(target_arch = "x86_64")]
fn test_focal_ovmf() {
test_simple_launch(fw_path(FwType::Ovmf), FOCAL_IMAGE_NAME)
test_simple_launch(fw_path(FwType::Ovmf), FOCAL_IMAGE_NAME);
}
#[cfg(target_arch = "x86_64")]
@ -3470,27 +3470,27 @@ mod common_parallel {
#[test]
fn test_virtio_block_io_uring() {
_test_virtio_block(FOCAL_IMAGE_NAME, false, true)
_test_virtio_block(FOCAL_IMAGE_NAME, false, true);
}
#[test]
fn test_virtio_block_aio() {
_test_virtio_block(FOCAL_IMAGE_NAME, true, false)
_test_virtio_block(FOCAL_IMAGE_NAME, true, false);
}
#[test]
fn test_virtio_block_sync() {
_test_virtio_block(FOCAL_IMAGE_NAME, true, true)
_test_virtio_block(FOCAL_IMAGE_NAME, true, true);
}
#[test]
fn test_virtio_block_qcow2() {
_test_virtio_block(FOCAL_IMAGE_NAME_QCOW2, false, false)
_test_virtio_block(FOCAL_IMAGE_NAME_QCOW2, false, false);
}
#[test]
fn test_virtio_block_qcow2_backing_file() {
_test_virtio_block(FOCAL_IMAGE_NAME_QCOW2_BACKING_FILE, false, false)
_test_virtio_block(FOCAL_IMAGE_NAME_QCOW2_BACKING_FILE, false, false);
}
#[test]
@ -3515,7 +3515,7 @@ mod common_parallel {
.output()
.expect("Expect generating VHD image from RAW image");
_test_virtio_block(FOCAL_IMAGE_NAME_VHD, false, false)
_test_virtio_block(FOCAL_IMAGE_NAME_VHD, false, false);
}
#[test]
@ -3539,7 +3539,7 @@ mod common_parallel {
.output()
.expect("Expect generating dynamic VHDx image from RAW image");
_test_virtio_block(FOCAL_IMAGE_NAME_VHDX, false, false)
_test_virtio_block(FOCAL_IMAGE_NAME_VHDX, false, false);
}
#[test]
@ -3677,7 +3677,7 @@ mod common_parallel {
#[test]
fn test_vhost_user_net_default() {
test_vhost_user_net(None, 2, &prepare_vhost_user_net_daemon, false, false)
test_vhost_user_net(None, 2, &prepare_vhost_user_net_daemon, false, false);
}
#[test]
@ -3688,7 +3688,7 @@ mod common_parallel {
&prepare_vhost_user_net_daemon,
false,
false,
)
);
}
#[test]
@ -3699,12 +3699,12 @@ mod common_parallel {
&prepare_vhost_user_net_daemon,
false,
false,
)
);
}
#[test]
fn test_vhost_user_net_multiple_queues() {
test_vhost_user_net(None, 4, &prepare_vhost_user_net_daemon, false, false)
test_vhost_user_net(None, 4, &prepare_vhost_user_net_daemon, false, false);
}
#[test]
@ -3715,40 +3715,40 @@ mod common_parallel {
&prepare_vhost_user_net_daemon,
false,
false,
)
);
}
#[test]
fn test_vhost_user_net_host_mac() {
test_vhost_user_net(None, 2, &prepare_vhost_user_net_daemon, true, false)
test_vhost_user_net(None, 2, &prepare_vhost_user_net_daemon, true, false);
}
#[test]
fn test_vhost_user_net_client_mode() {
test_vhost_user_net(None, 2, &prepare_vhost_user_net_daemon, false, true)
test_vhost_user_net(None, 2, &prepare_vhost_user_net_daemon, false, true);
}
#[test]
#[cfg(not(target_arch = "aarch64"))]
fn test_vhost_user_blk_default() {
test_vhost_user_blk(2, false, false, Some(&prepare_vubd))
test_vhost_user_blk(2, false, false, Some(&prepare_vubd));
}
#[test]
#[cfg(not(target_arch = "aarch64"))]
fn test_vhost_user_blk_readonly() {
test_vhost_user_blk(1, true, false, Some(&prepare_vubd))
test_vhost_user_blk(1, true, false, Some(&prepare_vubd));
}
#[test]
#[cfg(not(target_arch = "aarch64"))]
fn test_vhost_user_blk_direct() {
test_vhost_user_blk(1, false, true, Some(&prepare_vubd))
test_vhost_user_blk(1, false, true, Some(&prepare_vubd));
}
#[test]
fn test_boot_from_vhost_user_blk_default() {
test_boot_from_vhost_user_blk(1, false, false, Some(&prepare_vubd))
test_boot_from_vhost_user_blk(1, false, false, Some(&prepare_vubd));
}
#[test]
@ -3928,32 +3928,32 @@ mod common_parallel {
#[test]
fn test_virtio_fs() {
_test_virtio_fs(&prepare_virtiofsd, false, None)
_test_virtio_fs(&prepare_virtiofsd, false, None);
}
#[test]
fn test_virtio_fs_hotplug() {
_test_virtio_fs(&prepare_virtiofsd, true, None)
_test_virtio_fs(&prepare_virtiofsd, true, None);
}
#[test]
fn test_virtio_fs_multi_segment_hotplug() {
_test_virtio_fs(&prepare_virtiofsd, true, Some(15))
_test_virtio_fs(&prepare_virtiofsd, true, Some(15));
}
#[test]
fn test_virtio_fs_multi_segment() {
_test_virtio_fs(&prepare_virtiofsd, false, Some(15))
_test_virtio_fs(&prepare_virtiofsd, false, Some(15));
}
#[test]
fn test_virtio_pmem_discard_writes() {
test_virtio_pmem(true, false)
test_virtio_pmem(true, false);
}
#[test]
fn test_virtio_pmem_with_size() {
test_virtio_pmem(true, true)
test_virtio_pmem(true, true);
}
#[test]
@ -4353,7 +4353,7 @@ mod common_parallel {
let r = std::panic::catch_unwind(|| {
// Check that the cloud-hypervisor binary actually terminated
assert!(output.status.success())
assert!(output.status.success());
});
handle_child_output(r, &output);
}
@ -4806,7 +4806,7 @@ mod common_parallel {
#[test]
fn test_virtio_vsock() {
_test_virtio_vsock(false)
_test_virtio_vsock(false);
}
#[test]
@ -4819,7 +4819,7 @@ mod common_parallel {
let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string());
let guest = Guest::new(Box::new(disk_config));
_test_api_shutdown(TargetApi::new_http_api(&guest.tmp_dir), guest)
_test_api_shutdown(TargetApi::new_http_api(&guest.tmp_dir), guest);
}
#[test]
@ -4835,7 +4835,7 @@ mod common_parallel {
let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string());
let guest = Guest::new(Box::new(disk_config));
_test_api_pause_resume(TargetApi::new_http_api(&guest.tmp_dir), guest)
_test_api_pause_resume(TargetApi::new_http_api(&guest.tmp_dir), guest);
}
#[test]
@ -4843,12 +4843,12 @@ mod common_parallel {
let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string());
let guest = Guest::new(Box::new(disk_config));
_test_api_create_boot(TargetApi::new_http_api(&guest.tmp_dir), guest)
_test_api_create_boot(TargetApi::new_http_api(&guest.tmp_dir), guest);
}
#[test]
fn test_virtio_iommu() {
_test_virtio_iommu(cfg!(target_arch = "x86_64"))
_test_virtio_iommu(cfg!(target_arch = "x86_64"));
}
#[test]
@ -4957,7 +4957,7 @@ mod common_parallel {
#[test]
fn test_memory_mergeable_off() {
test_memory_mergeable(false)
test_memory_mergeable(false);
}
#[test]
@ -5558,13 +5558,13 @@ mod common_parallel {
#[test]
fn test_disk_hotplug() {
_test_disk_hotplug(false)
_test_disk_hotplug(false);
}
#[test]
#[cfg(target_arch = "x86_64")]
fn test_disk_hotplug_with_landlock() {
_test_disk_hotplug(true)
_test_disk_hotplug(true);
}
fn create_loop_device(backing_file_path: &str, block_size: u32, num_retries: usize) -> String {
@ -5909,12 +5909,12 @@ mod common_parallel {
#[test]
fn test_pmem_hotplug() {
_test_pmem_hotplug(None)
_test_pmem_hotplug(None);
}
#[test]
fn test_pmem_multi_segment_hotplug() {
_test_pmem_hotplug(Some(15))
_test_pmem_hotplug(Some(15));
}
fn _test_pmem_hotplug(pci_segment: Option<u16>) {
@ -6054,12 +6054,12 @@ mod common_parallel {
#[test]
fn test_net_hotplug() {
_test_net_hotplug(None)
_test_net_hotplug(None);
}
#[test]
fn test_net_multi_segment_hotplug() {
_test_net_hotplug(Some(15))
_test_net_hotplug(Some(15));
}
fn _test_net_hotplug(pci_segment: Option<u16>) {
@ -6772,13 +6772,13 @@ mod common_parallel {
#[test]
#[cfg_attr(target_arch = "aarch64", ignore = "See #5443")]
fn test_macvtap() {
_test_macvtap(false, "guestmacvtap0", "hostmacvtap0")
_test_macvtap(false, "guestmacvtap0", "hostmacvtap0");
}
#[test]
#[cfg_attr(target_arch = "aarch64", ignore = "See #5443")]
fn test_macvtap_hotplug() {
_test_macvtap(true, "guestmacvtap1", "hostmacvtap1")
_test_macvtap(true, "guestmacvtap1", "hostmacvtap1");
}
#[test]
@ -7487,7 +7487,7 @@ mod dbus_api {
let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string());
let guest = Guest::new(Box::new(disk_config));
_test_api_create_boot(TargetApi::new_dbus_api(&guest.tmp_dir), guest)
_test_api_create_boot(TargetApi::new_dbus_api(&guest.tmp_dir), guest);
}
#[test]
@ -7495,7 +7495,7 @@ mod dbus_api {
let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string());
let guest = Guest::new(Box::new(disk_config));
_test_api_shutdown(TargetApi::new_dbus_api(&guest.tmp_dir), guest)
_test_api_shutdown(TargetApi::new_dbus_api(&guest.tmp_dir), guest);
}
#[test]
@ -7511,7 +7511,7 @@ mod dbus_api {
let disk_config = UbuntuDiskConfig::new(JAMMY_IMAGE_NAME.to_string());
let guest = Guest::new(Box::new(disk_config));
_test_api_pause_resume(TargetApi::new_dbus_api(&guest.tmp_dir), guest)
_test_api_pause_resume(TargetApi::new_dbus_api(&guest.tmp_dir), guest);
}
}
@ -7921,13 +7921,13 @@ mod ivshmem {
#[test]
#[cfg(not(feature = "mshv"))]
fn test_live_migration_ivshmem() {
_test_live_migration_ivshmem(false)
_test_live_migration_ivshmem(false);
}
#[test]
#[cfg(not(feature = "mshv"))]
fn test_live_migration_ivshmem_local() {
_test_live_migration_ivshmem(true)
_test_live_migration_ivshmem(true);
}
}
@ -7939,7 +7939,7 @@ mod common_sequential {
#[test]
#[cfg(not(feature = "mshv"))]
fn test_memory_mergeable_on() {
test_memory_mergeable(true)
test_memory_mergeable(true);
}
pub(crate) fn snapshot_and_check_events(
@ -8018,7 +8018,7 @@ mod common_sequential {
let mut mem_params = "size=2G";
if use_hotplug {
mem_params = "size=2G,hotplug_method=virtio-mem,hotplug_size=32G"
mem_params = "size=2G,hotplug_method=virtio-mem,hotplug_size=32G";
}
let cloudinit_params = format!(
@ -8635,7 +8635,7 @@ mod common_sequential {
#[test]
fn test_virtio_pmem_persist_writes() {
test_virtio_pmem(false, false)
test_virtio_pmem(false, false);
}
}
@ -9690,12 +9690,12 @@ mod vfio {
#[test]
fn test_nvidia_card_memory_hotplug_acpi() {
test_nvidia_card_memory_hotplug("acpi")
test_nvidia_card_memory_hotplug("acpi");
}
#[test]
fn test_nvidia_card_memory_hotplug_virtio_mem() {
test_nvidia_card_memory_hotplug("virtio-mem")
test_nvidia_card_memory_hotplug("virtio-mem");
}
#[test]
@ -11203,12 +11203,12 @@ mod live_migration {
use super::*;
#[test]
fn test_live_migration_basic() {
_test_live_migration(false, false)
_test_live_migration(false, false);
}
#[test]
fn test_live_migration_local() {
_test_live_migration(false, true)
_test_live_migration(false, true);
}
#[test]
@ -11218,37 +11218,37 @@ mod live_migration {
#[test]
fn test_live_migration_watchdog() {
_test_live_migration_watchdog(false, false)
_test_live_migration_watchdog(false, false);
}
#[test]
fn test_live_migration_watchdog_local() {
_test_live_migration_watchdog(false, true)
_test_live_migration_watchdog(false, true);
}
#[test]
fn test_live_upgrade_basic() {
_test_live_migration(true, false)
_test_live_migration(true, false);
}
#[test]
fn test_live_upgrade_local() {
_test_live_migration(true, true)
_test_live_migration(true, true);
}
#[test]
fn test_live_upgrade_watchdog() {
_test_live_migration_watchdog(true, false)
_test_live_migration_watchdog(true, false);
}
#[test]
fn test_live_upgrade_watchdog_local() {
_test_live_migration_watchdog(true, true)
_test_live_migration_watchdog(true, true);
}
#[test]
#[cfg(target_arch = "x86_64")]
fn test_live_migration_with_landlock() {
_test_live_migration_with_landlock()
_test_live_migration_with_landlock();
}
}
@ -11259,42 +11259,42 @@ mod live_migration {
#[test]
fn test_live_migration_balloon() {
_test_live_migration_balloon(false, false)
_test_live_migration_balloon(false, false);
}
#[test]
fn test_live_migration_balloon_local() {
_test_live_migration_balloon(false, true)
_test_live_migration_balloon(false, true);
}
#[test]
fn test_live_upgrade_balloon() {
_test_live_migration_balloon(true, false)
_test_live_migration_balloon(true, false);
}
#[test]
fn test_live_upgrade_balloon_local() {
_test_live_migration_balloon(true, true)
_test_live_migration_balloon(true, true);
}
#[test]
fn test_live_migration_numa() {
_test_live_migration_numa(false, false)
_test_live_migration_numa(false, false);
}
#[test]
fn test_live_migration_numa_local() {
_test_live_migration_numa(false, true)
_test_live_migration_numa(false, true);
}
#[test]
fn test_live_upgrade_numa() {
_test_live_migration_numa(true, false)
_test_live_migration_numa(true, false);
}
#[test]
fn test_live_upgrade_numa_local() {
_test_live_migration_numa(true, true)
_test_live_migration_numa(true, true);
}
// Require to run ovs-dpdk tests sequentially because they rely on the same ovs-dpdk setup
@ -11395,7 +11395,7 @@ mod aarch64_acpi {
#[test]
fn test_virtio_iommu() {
_test_virtio_iommu(true)
_test_virtio_iommu(true);
}
}
@ -11674,7 +11674,7 @@ mod rate_limiter {
#[test]
fn test_rate_limiter_block_bandwidth() {
_test_rate_limiter_block(true, 1);
_test_rate_limiter_block(true, 2)
_test_rate_limiter_block(true, 2);
}
#[test]

10
tpm/src/lib.rs
View file

@ -209,7 +209,7 @@ impl Ptm for PtmEst {
fn set_member_type(&mut self, _mem: MemberType) {}
fn set_result_code(&mut self, res: u32) {
self.result_code = res
self.result_code = res;
}
fn get_result_code(&self) -> u32 {
@ -269,11 +269,11 @@ impl Ptm for PtmInit {
}
fn set_member_type(&mut self, mem: MemberType) {
self.member = mem
self.member = mem;
}
fn set_result_code(&mut self, res: u32) {
self.result_code = res
self.result_code = res;
}
fn get_result_code(&self) -> u32 {
@ -368,11 +368,11 @@ impl Ptm for PtmSetBufferSize {
}
fn set_member_type(&mut self, mem: MemberType) {
self.mem = mem
self.mem = mem;
}
fn set_result_code(&mut self, res: u32) {
self.result_code = res
self.result_code = res;
}
fn get_result_code(&self) -> u32 {

2
vhost_user_block/src/lib.rs
View file

@ -541,7 +541,7 @@ pub fn start_block_backend(backend_command: &str) {
for thread in blk_backend.read().unwrap().threads.iter() {
if let Err(e) = thread.lock().unwrap().kill_evt.write(1) {
error!("Error shutting down worker thread: {e:?}")
error!("Error shutting down worker thread: {e:?}");
}
}
}

6
vhost_user_net/src/lib.rs
View file

@ -228,7 +228,7 @@ impl VhostUserBackendMut for VhostUserNetBackend {
{
vring
.signal_used_queue()
.map_err(Error::FailedSignalingUsedQueue)?
.map_err(Error::FailedSignalingUsedQueue)?;
}
}
3 => {
@ -240,7 +240,7 @@ impl VhostUserBackendMut for VhostUserNetBackend {
{
vring
.signal_used_queue()
.map_err(Error::FailedSignalingUsedQueue)?
.map_err(Error::FailedSignalingUsedQueue)?;
}
}
_ => return Err(Error::HandleEventUnknownEvent.into()),
@ -406,7 +406,7 @@ pub fn start_net_backend(backend_command: &str) {
for thread in net_backend.read().unwrap().threads.iter() {
if let Err(e) = thread.lock().unwrap().kill_evt.write(1) {
error!("Error shutting down worker thread: {e:?}")
error!("Error shutting down worker thread: {e:?}");
}
}
}

2
virtio-devices/src/balloon.rs
View file

@ -546,7 +546,7 @@ impl VirtioDevice for Balloon {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {

10
virtio-devices/src/block.rs
View file

@ -522,7 +522,7 @@ impl BlockEpollHandler {
"Failed scheduling the virtqueue thread {} on the expected CPU set: {}",
self.queue_index,
io::Error::last_os_error()
)
);
}
}
}
@ -562,7 +562,7 @@ impl EpollHelperHandler for BlockEpollHandler {
// Process the queue only when the rate limit is not reached
if !rate_limit_reached {
self.process_queue_submit_and_signal()?
self.process_queue_submit_and_signal()?;
}
}
COMPLETION_EVENT => {
@ -598,7 +598,7 @@ impl EpollHelperHandler for BlockEpollHandler {
))
})?;
self.process_queue_submit_and_signal()?
self.process_queue_submit_and_signal()?;
} else {
return Err(EpollHelperError::HandleEvent(anyhow!(
"Unexpected 'RATE_LIMITER_EVENT' when rate_limiter is not enabled."
@ -874,7 +874,7 @@ impl VirtioDevice for Block {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -1027,7 +1027,7 @@ impl VirtioDevice for Block {
}
fn set_access_platform(&mut self, access_platform: Arc<dyn AccessPlatform>) {
self.common.set_access_platform(access_platform)
self.common.set_access_platform(access_platform);
}
}

4
virtio-devices/src/console.rs
View file

@ -694,7 +694,7 @@ impl VirtioDevice for Console {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -766,7 +766,7 @@ impl VirtioDevice for Console {
}
fn set_access_platform(&mut self, access_platform: Arc<dyn AccessPlatform>) {
self.common.set_access_platform(access_platform)
self.common.set_access_platform(access_platform);
}
}

2
virtio-devices/src/iommu.rs
View file

@ -1048,7 +1048,7 @@ impl VirtioDevice for Iommu {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {

2
virtio-devices/src/mem.rs
View file

@ -901,7 +901,7 @@ impl VirtioDevice for Mem {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {

4
virtio-devices/src/net.rs
View file

@ -684,7 +684,7 @@ impl VirtioDevice for Net {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -852,7 +852,7 @@ impl VirtioDevice for Net {
}
fn set_access_platform(&mut self, access_platform: Arc<dyn AccessPlatform>) {
self.common.set_access_platform(access_platform)
self.common.set_access_platform(access_platform);
}
}

4
virtio-devices/src/pmem.rs
View file

@ -374,7 +374,7 @@ impl VirtioDevice for Pmem {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -440,7 +440,7 @@ impl VirtioDevice for Pmem {
}
fn set_access_platform(&mut self, access_platform: Arc<dyn AccessPlatform>) {
self.common.set_access_platform(access_platform)
self.common.set_access_platform(access_platform);
}
}

4
virtio-devices/src/rng.rs
View file

@ -239,7 +239,7 @@ impl VirtioDevice for Rng {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn activate(
@ -297,7 +297,7 @@ impl VirtioDevice for Rng {
}
fn set_access_platform(&mut self, access_platform: Arc<dyn AccessPlatform>) {
self.common.set_access_platform(access_platform)
self.common.set_access_platform(access_platform);
}
}

7
virtio-devices/src/transport/pci_common_config.rs
View file

@ -203,7 +203,12 @@ impl VirtioPciCommonConfig {
1 => self.write_common_config_byte(offset, data[0]),
2 => self.write_common_config_word(offset, LittleEndian::read_u16(data), queues),
4 => {
self.write_common_config_dword(offset, LittleEndian::read_u32(data), queues, device)
self.write_common_config_dword(
offset,
LittleEndian::read_u32(data),
queues,
device,
);
}
8 => self.write_common_config_qword(offset, LittleEndian::read_u64(data), queues),
_ => error!("invalid data length for virtio write: len {}", data.len()),

6
virtio-devices/src/transport/pci_device.rs
View file

@ -395,7 +395,7 @@ impl VirtioPciDevice {
for _ in locked_device.queue_max_sizes().iter() {
queue_evts.push(EventFd::new(EFD_NONBLOCK).map_err(|e| {
VirtioPciDeviceError::CreateVirtioPciDevice(anyhow!("Failed creating eventfd: {e}"))
})?)
})?);
}
let num_queues = locked_device.queue_max_sizes().len();
@ -748,7 +748,7 @@ impl VirtioPciDevice {
let bar_offset: u32 =
// SAFETY: we know self.cap_pci_cfg_info.cap.cap.offset is 32bits long.
unsafe { std::mem::transmute(self.cap_pci_cfg_info.cap.cap.offset) };
self.read_bar(0, bar_offset as u64, data)
self.read_bar(0, bar_offset as u64, data);
}
}
@ -1240,7 +1240,7 @@ impl PciDevice for VirtioPciDevice {
impl BusDevice for VirtioPciDevice {
fn read(&mut self, base: u64, offset: u64, data: &mut [u8]) {
self.read_bar(base, offset, data)
self.read_bar(base, offset, data);
}
fn write(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {

4
virtio-devices/src/vdpa.rs
View file

@ -398,7 +398,7 @@ impl VirtioDevice for Vdpa {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -444,7 +444,7 @@ impl VirtioDevice for Vdpa {
}
fn set_access_platform(&mut self, access_platform: Arc<dyn AccessPlatform>) {
self.common.set_access_platform(access_platform)
self.common.set_access_platform(access_platform);
}
}

4
virtio-devices/src/vhost_user/blk.rs
View file

@ -244,7 +244,7 @@ impl VirtioDevice for Blk {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -346,7 +346,7 @@ impl VirtioDevice for Blk {
}
fn shutdown(&mut self) {
self.vu_common.shutdown()
self.vu_common.shutdown();
}
fn add_memory_region(

6
virtio-devices/src/vhost_user/fs.rs
View file

@ -252,7 +252,7 @@ impl VirtioDevice for Fs {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -326,7 +326,7 @@ impl VirtioDevice for Fs {
}
fn shutdown(&mut self) {
self.vu_common.shutdown()
self.vu_common.shutdown();
}
fn get_shm_regions(&self) -> Option<VirtioSharedMemoryList> {
@ -361,7 +361,7 @@ impl VirtioDevice for Fs {
addr: cache.0.addr,
len: cache.0.len,
mergeable: false,
})
});
}
mappings

2
virtio-devices/src/vhost_user/net.rs
View file

@ -282,7 +282,7 @@ impl VirtioDevice for Net {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {

6
virtio-devices/src/vsock/device.rs
View file

@ -406,7 +406,7 @@ where
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn read_config(&self, offset: u64, data: &mut [u8]) {
@ -414,7 +414,7 @@ where
0 if data.len() == 8 => LittleEndian::write_u64(data, self.cid),
0 if data.len() == 4 => LittleEndian::write_u32(data, (self.cid & 0xffff_ffff) as u32),
4 if data.len() == 4 => {
LittleEndian::write_u32(data, ((self.cid >> 32) & 0xffff_ffff) as u32)
LittleEndian::write_u32(data, ((self.cid >> 32) & 0xffff_ffff) as u32);
}
_ => warn!(
"vsock: virtio-vsock received invalid read request of {} bytes at offset {}",
@ -481,7 +481,7 @@ where
}
fn set_access_platform(&mut self, access_platform: Arc<dyn AccessPlatform>) {
self.common.set_access_platform(access_platform)
self.common.set_access_platform(access_platform);
}
}

2
virtio-devices/src/vsock/unix/muxer.rs
View file

@ -476,7 +476,7 @@ impl VsockMuxer {
})
.unwrap_or_else(|err| {
info!("vsock: error adding local-init connection: {err:?}");
})
});
}
}

2
virtio-devices/src/watchdog.rs
View file

@ -321,7 +321,7 @@ impl VirtioDevice for Watchdog {
}
fn ack_features(&mut self, value: u64) {
self.common.ack_features(value)
self.common.ack_features(value);
}
fn activate(

2
vm-allocator/src/memory_slot.rs
View file

@ -23,7 +23,7 @@ impl MemorySlotAllocator {
/// Release memory slot for reuse
pub fn free_memory_slot(&mut self, slot: u32) {
self.memory_slot_free_list.lock().unwrap().push(slot)
self.memory_slot_free_list.lock().unwrap().push(slot);
}
/// Instantiate struct

4
vm-allocator/src/system.rs
View file

@ -119,12 +119,12 @@ impl SystemAllocator {
/// Free an IO address range.
/// We can only free a range if it matches exactly an already allocated range.
pub fn free_io_addresses(&mut self, address: GuestAddress, size: GuestUsize) {
self.io_address_space.free(address, size)
self.io_address_space.free(address, size);
}
/// Free a platform MMIO address range.
/// We can only free a range if it matches exactly an already allocated range.
pub fn free_platform_mmio_addresses(&mut self, address: GuestAddress, size: GuestUsize) {
self.platform_mmio_address_space.free(address, size)
self.platform_mmio_address_space.free(address, size);
}
}

4
vm-device/src/bus.rs
View file

@ -43,7 +43,7 @@ impl<B: BusDevice> BusDeviceSync for Mutex<B> {
fn read(&self, base: u64, offset: u64, data: &mut [u8]) {
self.lock()
.expect("Failed to acquire device lock")
.read(base, offset, data)
.read(base, offset, data);
}
/// Writes at `offset` into this device
fn write(&self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
@ -275,7 +275,7 @@ mod unit_tests {
fn write(&self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
for (i, v) in data.iter().enumerate() {
assert_eq!(*v, (offset as u8) + (i as u8))
assert_eq!(*v, (offset as u8) + (i as u8));
}
None

4
vm-migration/src/protocol.rs
View file

@ -267,7 +267,7 @@ impl MemoryRangeTable {
}
pub fn push(&mut self, range: MemoryRange) {
self.data.push(range)
self.data.push(range);
}
pub fn read_from(fd: &mut dyn Read, length: u64) -> Result<MemoryRangeTable, MigratableError> {
@ -307,7 +307,7 @@ impl MemoryRangeTable {
}
pub fn extend(&mut self, table: Self) {
self.data.extend(table.data)
self.data.extend(table.data);
}
pub fn new_from_tables(tables: Vec<Self>) -> Self {

4
vm-virtio/src/queue.rs
View file

@ -46,7 +46,7 @@ pub mod testing {
// Writes to the actual memory location.
pub fn set(&self, val: T) {
self.mem.write_obj(val, self.location).unwrap()
self.mem.write_obj(val, self.location).unwrap();
}
// This function returns a place in memory which holds a value of type U, and starts
@ -143,7 +143,7 @@ pub mod testing {
for _ in 1..qsize as usize {
let x = ring.last().unwrap().next_place();
ring.push(x)
ring.push(x);
}
let event = ring.last().unwrap().next_place();

4
vmm/src/acpi.rs
View file

@ -309,7 +309,7 @@ fn create_srat_table(
region,
proximity_domain,
MemAffinityFlags::ENABLE,
))
));
}
for region in &node.hotplug_regions {
@ -317,7 +317,7 @@ fn create_srat_table(
region,
proximity_domain,
MemAffinityFlags::ENABLE | MemAffinityFlags::HOTPLUGGABLE,
))
));
}
for cpu in &node.cpus {

14
vmm/src/config.rs
View file

@ -1835,11 +1835,11 @@ impl ConsoleConfig {
if parser.is_set("off") {
} else if parser.is_set("pty") {
mode = ConsoleOutputMode::Pty
mode = ConsoleOutputMode::Pty;
} else if parser.is_set("tty") {
mode = ConsoleOutputMode::Tty
mode = ConsoleOutputMode::Tty;
} else if parser.is_set("null") {
mode = ConsoleOutputMode::Null
mode = ConsoleOutputMode::Null;
} else if parser.is_set("file") {
mode = ConsoleOutputMode::File;
file =
@ -1890,11 +1890,11 @@ impl DebugConsoleConfig {
if parser.is_set("off") {
} else if parser.is_set("pty") {
mode = ConsoleOutputMode::Pty
mode = ConsoleOutputMode::Pty;
} else if parser.is_set("tty") {
mode = ConsoleOutputMode::Tty
mode = ConsoleOutputMode::Tty;
} else if parser.is_set("null") {
mode = ConsoleOutputMode::Null
mode = ConsoleOutputMode::Null;
} else if parser.is_set("file") {
mode = ConsoleOutputMode::File;
file =
@ -2327,7 +2327,7 @@ impl RestoreConfig {
}
if !restored_net_with_fds.is_empty() {
warn!("Ignoring unused 'net_fds' for VM restore.")
warn!("Ignoring unused 'net_fds' for VM restore.");
}
Ok(())

18
vmm/src/cpu.rs
View file

@ -739,7 +739,7 @@ impl VcpuState {
fn join_thread(&mut self) -> Result<()> {
if let Some(handle) = self.handle.take() {
handle.join().map_err(Error::ThreadCleanup)?
handle.join().map_err(Error::ThreadCleanup)?;
}
Ok(())
@ -747,7 +747,7 @@ impl VcpuState {
fn unpark_thread(&self) {
if let Some(handle) = self.handle.as_ref() {
handle.thread().unpark()
handle.thread().unpark();
}
}
}
@ -823,7 +823,7 @@ impl CpuManager {
let mut cpu_list = Vec::new();
for (proximity_domain, numa_node) in numa_nodes.iter() {
for cpu in numa_node.cpus.iter() {
cpu_list.push((*cpu, *proximity_domain))
cpu_list.push((*cpu, *proximity_domain));
}
}
cpu_list
@ -1263,7 +1263,7 @@ impl CpuManager {
Ok(details) => match details {
TdxExitDetails::GetQuote => warn!("TDG_VP_VMCALL_GET_QUOTE not supported"),
TdxExitDetails::SetupEventNotifyInterrupt => {
warn!("TDG_VP_VMCALL_SETUP_EVENT_NOTIFY_INTERRUPT not supported")
warn!("TDG_VP_VMCALL_SETUP_EVENT_NOTIFY_INTERRUPT not supported");
}
},
Err(e) => error!("Unexpected TDX VMCALL: {e}"),
@ -1424,7 +1424,7 @@ impl CpuManager {
cmp::Ordering::Greater => {
let vcpus = self.create_vcpus(desired_vcpus, None)?;
for vcpu in vcpus {
self.configure_vcpu(vcpu, None)?
self.configure_vcpu(vcpu, None)?;
}
self.activate_vcpus(desired_vcpus, true, None)?;
Ok(true)
@ -2223,7 +2223,7 @@ impl Aml for CpuNotify {
&aml::Equal::new(&aml::Arg(0), &self.cpu_id),
vec![&aml::Notify::new(&object, &aml::Arg(1))],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -2338,9 +2338,9 @@ impl Aml for CpuMethods {
&aml::Release::new("\\_SB_.PRES.CPLK".into()),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
} else {
aml::Method::new("CSCN".into(), 0, true, vec![]).to_aml_bytes(sink)
aml::Method::new("CSCN".into(), 0, true, vec![]).to_aml_bytes(sink);
}
}
}
@ -2435,7 +2435,7 @@ impl Aml for CpuManager {
cpu_data_inner.push(cpu_device);
}
aml::Device::new("_SB_.CPUS".into(), cpu_data_inner).to_aml_bytes(sink)
aml::Device::new("_SB_.CPUS".into(), cpu_data_inner).to_aml_bytes(sink);
}
}

20
vmm/src/device_manager.rs
View file

@ -688,7 +688,7 @@ impl Console {
pub fn update_console_size(&self) {
if let Some(resizer) = self.console_resizer.as_ref() {
resizer.update_console_size()
resizer.update_console_size();
}
}
}
@ -1171,7 +1171,7 @@ impl DeviceManager {
if let Some(pci_segments) = &config.lock().unwrap().pci_segments {
for pci_segment in pci_segments.iter() {
mmio32_aperture_weights[pci_segment.pci_segment as usize] =
pci_segment.mmio32_aperture_weight
pci_segment.mmio32_aperture_weight;
}
}
@ -1191,7 +1191,7 @@ impl DeviceManager {
if let Some(pci_segments) = &config.lock().unwrap().pci_segments {
for pci_segment in pci_segments.iter() {
mmio64_aperture_weights[pci_segment.pci_segment as usize] =
pci_segment.mmio64_aperture_weight
pci_segment.mmio64_aperture_weight;
}
}
@ -1460,7 +1460,7 @@ impl DeviceManager {
if let Some(tpm) = self.config.clone().lock().unwrap().tpm.as_ref() {
let tpm_dev = self.add_tpm_device(tpm.socket.clone())?;
self.bus_devices
.push(Arc::clone(&tpm_dev) as Arc<dyn BusDeviceSync>)
.push(Arc::clone(&tpm_dev) as Arc<dyn BusDeviceSync>);
}
self.legacy_interrupt_manager = Some(legacy_interrupt_manager);
@ -4606,7 +4606,7 @@ impl DeviceManager {
self.mmio_regions
.lock()
.unwrap()
.retain(|x| x.start != mmio_region.start)
.retain(|x| x.start != mmio_region.start);
}
(
@ -5078,7 +5078,7 @@ impl Aml for TpmDevice {
),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -5098,7 +5098,7 @@ impl Aml for DeviceManager {
}
let mut pci_scan_inner: Vec<&dyn Aml> = Vec::new();
for method in &pci_scan_methods {
pci_scan_inner.push(method)
pci_scan_inner.push(method);
}
// PCI hotplug controller
@ -5171,7 +5171,7 @@ impl Aml for DeviceManager {
true,
segment.mmio_config_address as u32,
layout::PCI_MMIO_CONFIG_SIZE_PER_SEGMENT as u32,
))
));
}
let mut mbrd_memory_refs = Vec::new();
@ -5281,7 +5281,7 @@ impl Aml for DeviceManager {
.unwrap()
.lock()
.unwrap()
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -5432,7 +5432,7 @@ impl BusDevice for DeviceManager {
_ => error!("Accessing unknown location at base 0x{base:x}, offset 0x{offset:x}"),
}
debug!("PCI_HP_REG_R: base 0x{base:x}, offset 0x{offset:x}, data {data:?}")
debug!("PCI_HP_REG_R: base 0x{base:x}, offset 0x{offset:x}, data {data:?}");
}
fn write(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<std::sync::Barrier>> {

4
vmm/src/lib.rs
View file

@ -1466,7 +1466,7 @@ impl Vmm {
// Wait for all the threads to finish
for thread in self.threads.drain(..) {
thread.join().map_err(Error::ThreadCleanup)?
thread.join().map_err(Error::ThreadCleanup)?;
}
Ok(())
@ -2214,7 +2214,7 @@ impl RequestHandler for Vmm {
})?;
if existing_memory_files.is_none() {
existing_memory_files = Some(HashMap::default())
existing_memory_files = Some(HashMap::default());
}
if let Some(ref mut existing_memory_files) = existing_memory_files {

6
vmm/src/memory_manager.rs
View file

@ -2131,7 +2131,7 @@ impl Aml for MemoryNotify {
&aml::Equal::new(&aml::Arg(0), &self.slot_id),
vec![&aml::Notify::new(&object, &aml::Arg(1))],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -2178,7 +2178,7 @@ impl Aml for MemorySlot {
),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -2361,7 +2361,7 @@ impl Aml for MemoryMethods {
&aml::Return::new(&aml::Path::new("MR64")),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}

8
vmm/src/pci_segment.rs
View file

@ -227,7 +227,7 @@ impl Aml for PciDevSlot {
),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -281,7 +281,7 @@ impl Aml for PciDevSlotMethods {
&aml::Release::new("\\_SB_.PHPR.BLCK".into()),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -344,7 +344,7 @@ impl Aml for PciDsmMethod {
&aml::Return::new(&aml::BufferData::new(vec![0])),
],
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}
@ -470,6 +470,6 @@ impl Aml for PciSegment {
format!("_SB_.PC{:02X}", self.id).as_str().into(),
pci_dsdt_inner_data,
)
.to_aml_bytes(sink)
.to_aml_bytes(sink);
}
}

4
vmm/src/vm.rs
View file

@ -1627,7 +1627,7 @@ impl Vm {
// Wait for all the threads to finish
for thread in self.threads.drain(..) {
thread.join().map_err(Error::ThreadCleanup)?
thread.join().map_err(Error::ThreadCleanup)?;
}
*state = new_state;
@ -2350,7 +2350,7 @@ impl Vm {
&self.memory_manager,
&self.numa_nodes,
tpm_enabled,
)?
)?;
}
}
}