From ba5af9298443769bd809f9470a1e6aaf7dd54ab3 Mon Sep 17 00:00:00 2001 From: Yi Wang Date: Thu, 27 Jul 2023 10:33:01 +0800 Subject: [PATCH] arch: x86_64: re-enable KVM_FEATURE_ASYNC_PF_INT in CPUID The commit b92fe648e925 (vmm: cpu: Disable KVM_FEATURE_ASYNC_PF_INT in CPUID) disabled APF (Asynchronous Page Fault) mechanism to address problem that makes vcpu thread spin 100%. As the actual issue is in KVM, which has been merged in commit 2f15d027c05f (KVM: x86: Properly handle APF vs disabled LAPIC situation) since 2021, so it's okay to re-enable APF now. Signed-off-by: Yi Wang --- arch/src/x86_64/mod.rs | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/src/x86_64/mod.rs b/arch/src/x86_64/mod.rs index cb99ed9d8..3c645c12c 100644 --- a/arch/src/x86_64/mod.rs +++ b/arch/src/x86_64/mod.rs @@ -39,7 +39,6 @@ const MTRR_EDX_BIT: u8 = 12; // Hypervisor ecx bit. const INVARIANT_TSC_EDX_BIT: u8 = 8; // Invariant TSC bit on 0x8000_0007 EDX // KVM feature bits -const KVM_FEATURE_ASYNC_PF_INT_BIT: u8 = 14; #[cfg(feature = "tdx")] const KVM_FEATURE_CLOCKSOURCE_BIT: u8 = 0; #[cfg(feature = "tdx")] @@ -675,14 +674,7 @@ pub fn generate_common_cpuid( 0x8000_0008 => { entry.eax = (entry.eax & 0xffff_ff00) | (phys_bits as u32 & 0xff); } - // Disable KVM_FEATURE_ASYNC_PF_INT - // This is required until we find out why the asynchronous page - // fault is generating unexpected behavior when using interrupt - // mechanism. - // TODO: Re-enable KVM_FEATURE_ASYNC_PF_INT (#2277) 0x4000_0001 => { - entry.eax &= !(1 << KVM_FEATURE_ASYNC_PF_INT_BIT); - // These features are not supported by TDX #[cfg(feature = "tdx")] if tdx_enabled {