cloud-hypervisor/hypervisor
Jinank Jain 461e31e6d8 hypervisor: Instruction emulator for ARM64 guest on MSHV
Currently it would be using the syndrome register for instruction
decoding which is what KVM has been using in-kernel to decode
instructions for ARM64 guests. In future, it could be extended with an
actual instruction emulator if required. But most Linux guests works
well with the instruction decoder using syndrome register.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2025-04-17 13:11:23 +00:00
..
src hypervisor: Instruction emulator for ARM64 guest on MSHV 2025-04-17 13:11:23 +00:00
Cargo.toml hypervisor: Add definition for parsing EsrEl2 register 2025-04-17 13:11:23 +00:00