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Jinank Jain 2798286278 hypervisor: Add GICv2M support for MSHV ARM64 guest 
MSHV does not emulate a GICv3-ITS for guests to support MSI interrupts,
instead it exposes a GICv2m device. Currently adding a skeleton code
which would be modified later on with complete implementation.

With this we can start compiling cloud-hypervisor for MSHV on ARM64.
This will make sure that we don't regress in future in terms of basic
compilation test.

Signed-off-by: Jinank Jain <jinankjain@microsoft.com>
2025-04-14 16:33:10 +00:00
..
src hypervisor: Add GICv2M support for MSHV ARM64 guest 2025-04-14 16:33:10 +00:00
Cargo.toml build: Centralize serde_json crate to workspace 2025-04-02 06:20:54 +00:00