Introduce RISC-V specific Vm traits and error variant, disable `create_irq_chip` on RISC-V platform. Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn> |
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| src | ||
| Cargo.toml | ||
Introduce RISC-V specific Vm traits and error variant, disable `create_irq_chip` on RISC-V platform. Signed-off-by: Ruoqing He <heruoqing@iscas.ac.cn> |
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|---|---|---|
| .. | ||
| src | ||
| Cargo.toml | ||