4abebc9e56
The MSRs are constant at boot time so rather than creating a vector in the boot_msr_entries() method instead reaturn a reference to static MSR array data. Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
606 lines
17 KiB
Rust
606 lines
17 KiB
Rust
// Copyright © 2024 Institute of Software, CAS. All rights reserved.
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//
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// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
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//
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// Copyright © 2020, Microsoft Corporation
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//
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// Copyright 2018-2019 CrowdStrike, Inc.
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//
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//
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use thiserror::Error;
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#[cfg(not(target_arch = "riscv64"))]
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use {anyhow::anyhow, vm_memory::GuestAddress};
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#[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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use crate::RegList;
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#[cfg(target_arch = "aarch64")]
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use crate::VcpuInit;
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#[cfg(target_arch = "x86_64")]
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use crate::arch::x86::{CpuIdEntry, FpuState, LapicState, MsrEntry, SpecialRegisters};
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#[cfg(feature = "tdx")]
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use crate::kvm::{TdxExitDetails, TdxExitStatus};
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use crate::{CpuState, MpState, StandardRegisters};
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#[cfg(target_arch = "x86_64")]
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#[derive(Copy, Clone, Default)]
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pub enum CpuVendor {
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#[default]
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Unknown,
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Intel,
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AMD,
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}
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#[derive(Error, Debug)]
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///
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/// Enum for CPU error
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pub enum HypervisorCpuError {
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///
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/// Setting standard registers error
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///
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#[error("Failed to set standard register")]
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SetStandardRegs(#[source] anyhow::Error),
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///
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/// Setting standard registers error
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///
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#[error("Failed to get standard registers")]
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GetStandardRegs(#[source] anyhow::Error),
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///
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/// Setting special register error
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///
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#[error("Failed to set special registers")]
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SetSpecialRegs(#[source] anyhow::Error),
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///
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/// Getting standard register error
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///
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#[error("Failed to get special registers")]
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GetSpecialRegs(#[source] anyhow::Error),
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///
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/// Setting floating point registers error
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///
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#[error("Failed to set floating point registers")]
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SetFloatingPointRegs(#[source] anyhow::Error),
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///
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/// Getting floating point register error
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///
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#[error("Failed to get floating points registers")]
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GetFloatingPointRegs(#[source] anyhow::Error),
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///
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/// Setting Cpuid error
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///
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#[error("Failed to set Cpuid")]
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SetCpuid(#[source] anyhow::Error),
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///
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/// Getting Cpuid error
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///
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#[error("Failed to get Cpuid")]
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GetCpuid(#[source] anyhow::Error),
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///
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/// Setting lapic state error
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///
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#[error("Failed to set Lapic state")]
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SetLapicState(#[source] anyhow::Error),
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///
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/// Getting Lapic state error
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///
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#[error("Failed to get Lapic state")]
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GetlapicState(#[source] anyhow::Error),
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///
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/// Setting MSR entries error
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///
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#[error("Failed to set Msr entries")]
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SetMsrEntries(#[source] anyhow::Error),
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///
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/// Getting Msr entries error
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///
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#[error("Failed to get Msr entries")]
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GetMsrEntries(#[source] anyhow::Error),
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///
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/// Setting multi-processing state error
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///
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#[error("Failed to set MP state")]
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SetMpState(#[source] anyhow::Error),
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///
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/// Getting multi-processing state error
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///
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#[error("Failed to get MP state")]
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GetMpState(#[source] anyhow::Error),
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///
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/// Setting Saved Processor Extended States error
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///
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#[cfg(feature = "kvm")]
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#[error("Failed to set Saved Processor Extended States")]
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SetXsaveState(#[source] anyhow::Error),
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///
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/// Getting Saved Processor Extended States error
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///
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#[cfg(feature = "kvm")]
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#[error("Failed to get Saved Processor Extended States")]
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GetXsaveState(#[source] anyhow::Error),
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///
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/// Getting the VP state components error
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///
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#[cfg(feature = "mshv")]
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#[error("Failed to get VP State Components")]
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GetAllVpStateComponents(#[source] anyhow::Error),
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///
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/// Setting the VP state components error
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///
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#[cfg(feature = "mshv")]
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#[error("Failed to set VP State Components")]
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SetAllVpStateComponents(#[source] anyhow::Error),
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///
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/// Setting Extended Control Registers error
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///
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#[error("Failed to set Extended Control Registers")]
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SetXcsr(#[source] anyhow::Error),
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///
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/// Getting Extended Control Registers error
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///
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#[error("Failed to get Extended Control Registers")]
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GetXcsr(#[source] anyhow::Error),
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///
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/// Running Vcpu error
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///
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#[error("Failed to run vcpu")]
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RunVcpu(#[source] anyhow::Error),
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///
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/// Getting Vcpu events error
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///
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#[error("Failed to get Vcpu events")]
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GetVcpuEvents(#[source] anyhow::Error),
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///
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/// Setting Vcpu events error
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///
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#[error("Failed to set Vcpu events")]
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SetVcpuEvents(#[source] anyhow::Error),
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///
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/// Vcpu Init error
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///
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#[error("Failed to init vcpu")]
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VcpuInit(#[source] anyhow::Error),
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///
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/// Vcpu Finalize error
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///
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#[error("Failed to finalize vcpu")]
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VcpuFinalize(#[source] anyhow::Error),
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///
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/// Setting one reg error
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///
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#[error("Failed to set one reg")]
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SetRegister(#[source] anyhow::Error),
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///
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/// Getting one reg error
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///
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#[error("Failed to get one reg")]
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GetRegister(#[source] anyhow::Error),
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///
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/// Getting guest clock paused error
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///
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#[error("Failed to notify guest its clock was paused")]
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NotifyGuestClockPaused(#[source] anyhow::Error),
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///
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/// Setting debug register error
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///
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#[error("Failed to set debug registers")]
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SetDebugRegs(#[source] anyhow::Error),
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///
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/// Getting debug register error
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///
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#[error("Failed to get debug registers")]
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GetDebugRegs(#[source] anyhow::Error),
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///
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/// Setting misc register error
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///
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#[error("Failed to set misc registers")]
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SetMiscRegs(#[source] anyhow::Error),
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///
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/// Getting misc register error
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///
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#[error("Failed to get misc registers")]
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GetMiscRegs(#[source] anyhow::Error),
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///
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/// Write to Guest Mem
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///
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#[error("Failed to write to Guest Mem at")]
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GuestMemWrite(#[source] anyhow::Error),
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/// Enabling HyperV SynIC error
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///
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#[error("Failed to enable HyperV SynIC")]
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EnableHyperVSyncIc(#[source] anyhow::Error),
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///
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/// Getting AArch64 core register error
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///
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#[error("Failed to get aarch64 core register")]
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GetAarchCoreRegister(#[source] anyhow::Error),
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///
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/// Setting AArch64 core register error
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///
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#[error("Failed to set aarch64 core register")]
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SetAarchCoreRegister(#[source] anyhow::Error),
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///
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/// Getting RISC-V 64-bit core register error
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///
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#[error("Failed to get riscv64 core register")]
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GetRiscvCoreRegister(#[source] anyhow::Error),
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///
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/// Setting RISC-V 64-bit core register error
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///
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#[error("Failed to set riscv64 core register")]
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SetRiscvCoreRegister(#[source] anyhow::Error),
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///
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/// Getting registers list error
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///
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#[error("Failed to retrieve list of registers")]
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GetRegList(#[source] anyhow::Error),
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///
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/// Getting AArch64 system register error
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///
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#[error("Failed to get system register")]
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GetSysRegister(#[source] anyhow::Error),
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///
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/// Setting AArch64 system register error
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///
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#[error("Failed to set system register")]
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SetSysRegister(#[source] anyhow::Error),
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///
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/// Getting RISC-V 64-bit non-core register error
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///
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#[error("Failed to get non-core register")]
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GetNonCoreRegister(#[source] anyhow::Error),
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///
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/// Setting RISC-V 64-bit non-core register error
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///
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#[error("Failed to set non-core register")]
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SetNonCoreRegister(#[source] anyhow::Error),
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///
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/// GVA translation error
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///
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#[error("Failed to translate GVA")]
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TranslateVirtualAddress(#[source] anyhow::Error),
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///
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/// Set cpu attribute error
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///
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#[error("Failed to set vcpu attribute")]
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SetVcpuAttribute(#[source] anyhow::Error),
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///
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/// Check if cpu has a certain attribute error
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///
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#[error("Failed to check if vcpu has attribute")]
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HasVcpuAttribute(#[source] anyhow::Error),
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///
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/// Failed to initialize TDX on CPU
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///
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#[cfg(feature = "tdx")]
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#[error("Failed to initialize TDX")]
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InitializeTdx(#[source] std::io::Error),
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///
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/// Unknown TDX VM call
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///
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#[cfg(feature = "tdx")]
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#[error("Unknown TDX VM call")]
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UnknownTdxVmCall,
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#[cfg(target_arch = "aarch64")]
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///
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/// Failed to initialize PMU
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///
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#[error("Failed to initialize PMU")]
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InitializePmu,
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#[cfg(target_arch = "x86_64")]
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///
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/// Error getting TSC frequency
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///
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#[error("Failed to get TSC frequency")]
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GetTscKhz(#[source] anyhow::Error),
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///
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/// Error setting TSC frequency
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///
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#[error("Failed to set TSC frequency")]
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SetTscKhz(#[source] anyhow::Error),
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///
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/// Error reading value at given GPA
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///
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#[error("Failed to read from GPA")]
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GpaRead(#[source] anyhow::Error),
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///
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/// Error writing value at given GPA
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///
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#[error("Failed to write to GPA")]
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GpaWrite(#[source] anyhow::Error),
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///
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/// Error getting CPUID leaf
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///
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#[error("Failed to get CPUID entries")]
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GetCpuidVales(#[source] anyhow::Error),
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///
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/// Setting SEV control register error
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///
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#[cfg(feature = "sev_snp")]
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#[error("Failed to set sev control register")]
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SetSevControlRegister(#[source] anyhow::Error),
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///
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/// Unsupported SysReg registers
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///
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#[cfg(target_arch = "aarch64")]
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#[error("Unsupported SysReg registers: {0}")]
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UnsupportedSysReg(u32),
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///
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/// Error injecting NMI
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///
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#[error("Failed to inject NMI")]
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Nmi(#[source] anyhow::Error),
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#[error("Failed to get nested guest state")]
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GetNestedState(#[source] anyhow::Error),
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#[error("Failed to set nested guest state")]
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SetNestedState(#[source] anyhow::Error),
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}
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#[derive(Debug)]
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pub enum VmExit {
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#[cfg(target_arch = "x86_64")]
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IoapicEoi(u8 /* vector */),
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Ignore,
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Reset,
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Shutdown,
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Hyperv,
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#[cfg(feature = "tdx")]
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Tdx,
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#[cfg(feature = "kvm")]
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Debug,
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}
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///
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/// Result type for returning from a function
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///
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pub type Result<T> = anyhow::Result<T, HypervisorCpuError>;
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///
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/// Trait to represent a generic Vcpu
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///
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pub trait Vcpu: Send + Sync {
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///
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/// Returns StandardRegisters with default value set
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///
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fn create_standard_regs(&self) -> StandardRegisters {
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unimplemented!();
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}
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///
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/// Returns the vCPU general purpose registers.
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///
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fn get_regs(&self) -> Result<StandardRegisters>;
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///
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/// Sets the vCPU general purpose registers.
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///
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fn set_regs(&self, regs: &StandardRegisters) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the vCPU special registers.
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///
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fn get_sregs(&self) -> Result<SpecialRegisters>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets the vCPU special registers
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///
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fn set_sregs(&self, sregs: &SpecialRegisters) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the floating point state (FPU) from the vCPU.
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///
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fn get_fpu(&self) -> Result<FpuState>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Set the floating point state (FPU) of a vCPU
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///
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fn set_fpu(&self, fpu: &FpuState) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to setup the CPUID registers.
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///
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fn set_cpuid2(&self, cpuid: &[CpuIdEntry]) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to enable HyperV SynIC
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///
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fn enable_hyperv_synic(&self) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to retrieve the CPUID registers.
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///
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fn get_cpuid2(&self, num_entries: usize) -> Result<Vec<CpuIdEntry>>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the state of the LAPIC (Local Advanced Programmable Interrupt Controller).
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///
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fn get_lapic(&self) -> Result<LapicState>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets the state of the LAPIC (Local Advanced Programmable Interrupt Controller).
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///
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fn set_lapic(&self, lapic: &LapicState) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the model-specific registers (MSR) for this vCPU.
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///
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fn get_msrs(&self, msrs: &mut Vec<MsrEntry>) -> Result<usize>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Setup the model-specific registers (MSR) for this vCPU.
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///
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fn set_msrs(&self, msrs: &[MsrEntry]) -> Result<usize>;
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///
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/// Returns the vcpu's current "multiprocessing state".
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///
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fn get_mp_state(&self) -> Result<MpState>;
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///
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/// Sets the vcpu's current "multiprocessing state".
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///
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fn set_mp_state(&self, mp_state: MpState) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Let the guest know that it has been paused, which prevents from
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/// potential soft lockups when being resumed.
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///
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fn notify_guest_clock_paused(&self) -> Result<()> {
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Ok(())
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}
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///
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/// Sets debug registers to set hardware breakpoints and/or enable single step.
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///
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#[cfg(not(target_arch = "riscv64"))]
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fn set_guest_debug(&self, _addrs: &[GuestAddress], _singlestep: bool) -> Result<()> {
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Err(HypervisorCpuError::SetDebugRegs(anyhow!("unimplemented")))
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}
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///
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/// Sets the type of CPU to be exposed to the guest and optional features.
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///
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#[cfg(target_arch = "aarch64")]
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fn vcpu_init(&self, kvi: &VcpuInit) -> Result<()>;
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#[cfg(target_arch = "aarch64")]
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fn vcpu_finalize(&self, feature: i32) -> Result<()>;
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///
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/// Gets the features that have been finalized for a given CPU.
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///
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#[cfg(target_arch = "aarch64")]
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fn vcpu_get_finalized_features(&self) -> i32;
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///
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/// Sets processor features for a given CPU.
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///
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#[cfg(target_arch = "aarch64")]
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fn vcpu_set_processor_features(
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&self,
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vm: &dyn crate::Vm,
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kvi: &mut VcpuInit,
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id: u32,
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) -> Result<()>;
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///
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/// Returns VcpuInit with default value set
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///
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#[cfg(target_arch = "aarch64")]
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fn create_vcpu_init(&self) -> VcpuInit;
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///
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/// Gets a list of the guest registers that are supported for the
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/// KVM_GET_ONE_REG/KVM_SET_ONE_REG calls.
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///
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#[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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fn get_reg_list(&self, reg_list: &mut RegList) -> Result<()>;
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///
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/// Gets the value of a system register
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///
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#[cfg(target_arch = "aarch64")]
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fn get_sys_reg(&self, sys_reg: u32) -> Result<u64>;
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///
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/// Gets the value of a non-core register on RISC-V 64-bit
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///
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#[cfg(target_arch = "riscv64")]
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fn get_non_core_reg(&self, non_core_reg: u32) -> Result<u64>;
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///
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/// Configure core registers for a given CPU.
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///
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#[cfg(any(target_arch = "aarch64", target_arch = "riscv64"))]
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fn setup_regs(&self, cpu_id: u32, boot_ip: u64, fdt_start: u64) -> Result<()>;
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///
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/// Check if the CPU supports PMU
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///
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#[cfg(target_arch = "aarch64")]
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fn has_pmu_support(&self) -> bool;
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///
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/// Initialize PMU
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///
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#[cfg(target_arch = "aarch64")]
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fn init_pmu(&self, irq: u32) -> Result<()>;
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///
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/// Retrieve the vCPU state.
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/// This function is necessary to snapshot the VM
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///
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fn state(&self) -> Result<CpuState>;
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///
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/// Set the vCPU state.
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/// This function is required when restoring the VM
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///
|
|
fn set_state(&self, state: &CpuState) -> Result<()>;
|
|
///
|
|
/// Triggers the running of the current virtual CPU returning an exit reason.
|
|
///
|
|
fn run(&mut self) -> std::result::Result<VmExit, HypervisorCpuError>;
|
|
#[cfg(target_arch = "x86_64")]
|
|
///
|
|
/// Translate guest virtual address to guest physical address
|
|
///
|
|
fn translate_gva(&self, gva: u64, flags: u64) -> Result<(u64, u32)>;
|
|
///
|
|
/// Initialize TDX support on the vCPU
|
|
///
|
|
#[cfg(feature = "tdx")]
|
|
fn tdx_init(&self, _hob_address: u64) -> Result<()> {
|
|
unimplemented!()
|
|
}
|
|
///
|
|
/// Set the "immediate_exit" state
|
|
///
|
|
fn set_immediate_exit(&mut self, _exit: bool) {}
|
|
#[cfg(feature = "tdx")]
|
|
///
|
|
/// Returns the details about TDX exit reason
|
|
///
|
|
fn get_tdx_exit_details(&mut self) -> Result<TdxExitDetails> {
|
|
unimplemented!()
|
|
}
|
|
#[cfg(feature = "tdx")]
|
|
///
|
|
/// Set the status code for TDX exit
|
|
///
|
|
fn set_tdx_status(&mut self, _status: TdxExitStatus) {
|
|
unimplemented!()
|
|
}
|
|
#[cfg(target_arch = "x86_64")]
|
|
///
|
|
/// Return the list of initial MSR entries for a VCPU
|
|
///
|
|
fn boot_msr_entries(&self) -> &'static [MsrEntry];
|
|
|
|
#[cfg(target_arch = "x86_64")]
|
|
///
|
|
/// Get the frequency of the TSC if available
|
|
///
|
|
fn tsc_khz(&self) -> Result<Option<u32>> {
|
|
Ok(None)
|
|
}
|
|
#[cfg(target_arch = "x86_64")]
|
|
///
|
|
/// Set the frequency of the TSC if available
|
|
///
|
|
fn set_tsc_khz(&self, _freq: u32) -> Result<()> {
|
|
Ok(())
|
|
}
|
|
#[cfg(target_arch = "x86_64")]
|
|
///
|
|
/// X86 specific call to retrieve cpuid leaf
|
|
///
|
|
fn get_cpuid_values(
|
|
&self,
|
|
_function: u32,
|
|
_index: u32,
|
|
_xfem: u64,
|
|
_xss: u64,
|
|
) -> Result<[u32; 4]> {
|
|
unimplemented!()
|
|
}
|
|
#[cfg(feature = "mshv")]
|
|
fn set_sev_control_register(&self, _reg: u64) -> Result<()> {
|
|
unimplemented!()
|
|
}
|
|
///
|
|
/// Sets the value of GIC redistributor address
|
|
///
|
|
#[cfg(target_arch = "aarch64")]
|
|
fn set_gic_redistributor_addr(&self, _gicr_base_addr: u64) -> Result<()> {
|
|
Ok(())
|
|
}
|
|
#[cfg(target_arch = "x86_64")]
|
|
///
|
|
/// Trigger NMI interrupt
|
|
///
|
|
fn nmi(&self) -> Result<()>;
|
|
}
|