cb52cf91df
A BAR reprogramming of a PCI device will only happen when the (guest) kernel write to its PCI config space, e.g. the detection of bar reprogramming (`detect_bar_repgraomming()`) can be embedded to the PCI config space write (`write_config_register()`). It simplifies APIs exposed by the `struct PciConfiguration` and `trait PciDevice`. It also prepares for easier handling of pending bar reprogramming when the MSE bit of the COMMAND register is not enabled at the time of changing BAR registers. See: https://github.com/cloud-hypervisor/cloud-hypervisor/issues/7027#issuecomment-2853642959 Signed-off-by: Bo Chen <bchen@crusoe.ai> |
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