In case the host CPU exposes the support for LA57 feature through its cpuid, the CR4.LA57 bit is enabled accordingly. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> |
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| .. | ||
| src | ||
| Cargo.toml | ||
In case the host CPU exposes the support for LA57 feature through its cpuid, the CR4.LA57 bit is enabled accordingly. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> |
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|---|---|---|
| .. | ||
| src | ||
| Cargo.toml | ||