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vc4: Fix register class handling of DDX/DDY arguments.

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I had this exactly backwards, but apparently the piglit tests were all
landing in r0-r3 anyway.

Cc: "13.0" <mesa-stable@lists.freedesktop.org>
This commit is contained in:
Eric Anholt 2016-11-11 14:04:42 -08:00
parent 9b121512ac
commit 977d8b526b
1 changed files with 1 additions and 1 deletions
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2
src/gallium/drivers/vc4/vc4_register_allocate.c
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@ -247,7 +247,7 @@ vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c)
case QOP_ROT_MUL:
assert(inst->src[0].file == QFILE_TEMP);
class_bits[inst->src[0].index] &= ~CLASS_BIT_R0_R3;
class_bits[inst->src[0].index] &= CLASS_BIT_R0_R3;
break;
default: