Use command:
find . -type d \( -path "./.git" -o -path "./docs/relnotes" \) -prune -o -type f -exec sed -i 's/PIPE_CAP_\([A-Za-z0-9_]*\)/pipe_caps.\L\1/g' {} +
find . -type d \( -path "./.git" -o -path "./docs/relnotes" \) -prune -o -type f -exec sed -i 's/PIPE_CAPF_\([A-Za-z0-9_]*\)/pipe_caps.\L\1/g' {} +
With manual adjustment for docs/gallium/screen.rst to merge
pipe_cap and pipe_capf section.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32955>
466 lines
15 KiB
C
466 lines
15 KiB
C
/*
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* Copyright (c) 2008-2024 Broadcom. All Rights Reserved.
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* The term “Broadcom” refers to Broadcom Inc.
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* and/or its subsidiaries.
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* SPDX-License-Identifier: MIT
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*/
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#include "pipe/p_defines.h"
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#include "draw/draw_context.h"
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#include "util/u_bitmask.h"
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#include "util/u_inlines.h"
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#include "util/u_math.h"
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#include "util/u_memory.h"
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#include "svga_cmd.h"
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#include "svga_context.h"
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#include "svga_hw_reg.h"
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#include "svga_screen.h"
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/* Hardware frontwinding is always set up as SVGA3D_FRONTWINDING_CW.
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*/
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static SVGA3dFace
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svga_translate_cullmode(unsigned mode, unsigned front_ccw)
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{
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const int hw_front_ccw = 0; /* hardware is always CW */
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switch (mode) {
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case PIPE_FACE_NONE:
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return SVGA3D_FACE_NONE;
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case PIPE_FACE_FRONT:
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return front_ccw == hw_front_ccw ? SVGA3D_FACE_FRONT : SVGA3D_FACE_BACK;
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case PIPE_FACE_BACK:
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return front_ccw == hw_front_ccw ? SVGA3D_FACE_BACK : SVGA3D_FACE_FRONT;
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case PIPE_FACE_FRONT_AND_BACK:
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return SVGA3D_FACE_FRONT_BACK;
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default:
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assert(0);
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return SVGA3D_FACE_NONE;
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}
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}
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static SVGA3dShadeMode
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svga_translate_flatshade(unsigned mode)
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{
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return mode ? SVGA3D_SHADEMODE_FLAT : SVGA3D_SHADEMODE_SMOOTH;
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}
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static unsigned
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translate_fill_mode(unsigned fill)
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{
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switch (fill) {
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case PIPE_POLYGON_MODE_POINT:
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return SVGA3D_FILLMODE_POINT;
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case PIPE_POLYGON_MODE_LINE:
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return SVGA3D_FILLMODE_LINE;
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case PIPE_POLYGON_MODE_FILL:
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return SVGA3D_FILLMODE_FILL;
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default:
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assert(!"Bad fill mode");
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return SVGA3D_FILLMODE_FILL;
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}
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}
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static unsigned
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translate_cull_mode(unsigned cull)
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{
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switch (cull) {
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case PIPE_FACE_NONE:
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return SVGA3D_CULL_NONE;
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case PIPE_FACE_FRONT:
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return SVGA3D_CULL_FRONT;
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case PIPE_FACE_BACK:
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return SVGA3D_CULL_BACK;
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case PIPE_FACE_FRONT_AND_BACK:
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/* NOTE: we simply no-op polygon drawing in svga_draw_vbo() */
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return SVGA3D_CULL_NONE;
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default:
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assert(!"Bad cull mode");
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return SVGA3D_CULL_NONE;
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}
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}
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int
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svga_define_rasterizer_object(struct svga_context *svga,
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struct svga_rasterizer_state *rast,
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unsigned samples)
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{
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struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
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unsigned fill_mode = translate_fill_mode(rast->templ.fill_front);
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const unsigned cull_mode = translate_cull_mode(rast->templ.cull_face);
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const int depth_bias = rast->templ.offset_units;
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const float slope_scaled_depth_bias = rast->templ.offset_scale;
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/* pipe_caps.polygon_offset_clamp not supported: */
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const float depth_bias_clamp = 0.0;
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const float line_width = rast->templ.line_width > 0.0f ?
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rast->templ.line_width : 1.0f;
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const uint8 line_factor = rast->templ.line_stipple_enable ?
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rast->templ.line_stipple_factor : 0;
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const uint16 line_pattern = rast->templ.line_stipple_enable ?
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rast->templ.line_stipple_pattern : 0;
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const uint8 pv_last = !rast->templ.flatshade_first &&
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svgascreen->haveProvokingVertex;
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int rastId;
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enum pipe_error ret;
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rastId = util_bitmask_add(svga->rast_object_id_bm);
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if (rast->templ.fill_front != rast->templ.fill_back) {
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/* The VGPU10 device can't handle different front/back fill modes.
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* We'll handle that with a swtnl/draw fallback. But we need to
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* make sure we always fill triangles in that case.
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*/
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fill_mode = SVGA3D_FILLMODE_FILL;
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}
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if (samples > 1 && svga_have_gl43(svga) &&
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svgascreen->sws->have_rasterizer_state_v2_cmd) {
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ret = SVGA3D_sm5_DefineRasterizerState_v2(svga->swc,
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rastId,
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fill_mode,
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cull_mode,
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rast->templ.front_ccw,
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depth_bias,
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depth_bias_clamp,
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slope_scaled_depth_bias,
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rast->templ.depth_clip_near,
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rast->templ.scissor,
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rast->templ.multisample,
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rast->templ.line_smooth,
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line_width,
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rast->templ.line_stipple_enable,
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line_factor,
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line_pattern,
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pv_last,
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samples);
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} else {
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ret = SVGA3D_vgpu10_DefineRasterizerState(svga->swc,
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rastId,
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fill_mode,
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cull_mode,
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rast->templ.front_ccw,
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depth_bias,
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depth_bias_clamp,
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slope_scaled_depth_bias,
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rast->templ.depth_clip_near,
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rast->templ.scissor,
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rast->templ.multisample,
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rast->templ.line_smooth,
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line_width,
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rast->templ.line_stipple_enable,
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line_factor,
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line_pattern,
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pv_last);
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}
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if (ret != PIPE_OK) {
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util_bitmask_clear(svga->rast_object_id_bm, rastId);
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return SVGA3D_INVALID_ID;
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}
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return rastId;
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}
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static void *
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svga_create_rasterizer_state(struct pipe_context *pipe,
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const struct pipe_rasterizer_state *templ)
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{
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struct svga_context *svga = svga_context(pipe);
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struct svga_rasterizer_state *rast = CALLOC_STRUCT(svga_rasterizer_state);
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struct svga_screen *screen = svga_screen(pipe->screen);
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if (!rast)
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return NULL;
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/* need this for draw module. */
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rast->templ = *templ;
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rast->shademode = svga_translate_flatshade(templ->flatshade);
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rast->cullmode = svga_translate_cullmode(templ->cull_face, templ->front_ccw);
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rast->scissortestenable = templ->scissor;
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rast->multisampleantialias = templ->multisample;
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rast->antialiasedlineenable = templ->line_smooth;
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rast->lastpixel = templ->line_last_pixel;
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rast->pointsprite = templ->point_quad_rasterization;
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if (rast->templ.multisample) {
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/* The OpenGL 3.0 spec says points are always drawn as circles when
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* MSAA is enabled. Note that our implementation isn't 100% correct,
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* though. Our smooth point implementation involves drawing a square,
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* computing fragment distance from point center, then attenuating
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* the fragment alpha value. We should not attenuate alpha if msaa
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* is enabled. We should discard fragments entirely outside the circle
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* and let the GPU compute per-fragment coverage.
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* But as-is, our implementation gives acceptable results and passes
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* Piglit's MSAA point smooth test.
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*/
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rast->templ.point_smooth = true;
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}
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if (rast->templ.point_smooth &&
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rast->templ.point_size_per_vertex == 0 &&
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rast->templ.point_size <= screen->pointSmoothThreshold) {
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/* If the point size is less than the threshold, deactivate smoothing.
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* Note that this only effects point rendering when we use the
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* pipe_rasterizer_state::point_size value, not when the point size
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* is set in the VS.
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*/
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rast->templ.point_smooth = false;
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}
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if (rast->templ.point_smooth) {
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/* For smooth points we need to generate fragments for at least
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* a 2x2 region. Otherwise the quad we draw may be too small and
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* we may generate no fragments at all.
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*/
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rast->pointsize = MAX2(2.0f, templ->point_size);
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}
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else {
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rast->pointsize = templ->point_size;
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}
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rast->hw_fillmode = PIPE_POLYGON_MODE_FILL;
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/* Use swtnl + decomposition implement these:
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*/
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if (templ->line_width <= screen->maxLineWidth) {
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/* pass line width to device */
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rast->linewidth = MAX2(1.0F, templ->line_width);
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}
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else if (svga->debug.no_line_width) {
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/* nothing */
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}
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else {
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/* use 'draw' pipeline for wide line */
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
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rast->need_pipeline_lines_str = "line width";
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}
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if (templ->line_stipple_enable) {
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if (screen->haveLineStipple || svga->debug.force_hw_line_stipple) {
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SVGA3dLinePattern lp;
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lp.repeat = templ->line_stipple_factor + 1;
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lp.pattern = templ->line_stipple_pattern;
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rast->linepattern = lp.uintValue;
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}
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else {
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/* use 'draw' module to decompose into short line segments */
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
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rast->need_pipeline_lines_str = "line stipple";
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}
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}
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if (!svga_have_vgpu10(svga) && rast->templ.point_smooth) {
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_POINTS;
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rast->need_pipeline_points_str = "smooth points";
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}
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if (templ->line_smooth && !screen->haveLineSmooth) {
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/*
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* XXX: Enabling the pipeline slows down performance immensely, so ignore
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* line smooth state, where there is very little visual improvement.
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* Smooth lines will still be drawn for wide lines.
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*/
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#if 0
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_LINES;
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rast->need_pipeline_lines_str = "smooth lines";
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#endif
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}
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{
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int fill_front = templ->fill_front;
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int fill_back = templ->fill_back;
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int fill = PIPE_POLYGON_MODE_FILL;
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bool offset_front = util_get_offset(templ, fill_front);
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bool offset_back = util_get_offset(templ, fill_back);
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bool offset = false;
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switch (templ->cull_face) {
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case PIPE_FACE_FRONT_AND_BACK:
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offset = false;
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fill = PIPE_POLYGON_MODE_FILL;
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break;
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case PIPE_FACE_FRONT:
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offset = offset_back;
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fill = fill_back;
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break;
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case PIPE_FACE_BACK:
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offset = offset_front;
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fill = fill_front;
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break;
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case PIPE_FACE_NONE:
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if (fill_front != fill_back || offset_front != offset_back) {
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/* Always need the draw module to work out different
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* front/back fill modes:
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*/
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
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rast->need_pipeline_tris_str = "different front/back fillmodes";
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fill = PIPE_POLYGON_MODE_FILL;
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}
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else {
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offset = offset_front;
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fill = fill_front;
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}
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break;
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default:
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assert(0);
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break;
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}
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/* Unfilled primitive modes aren't implemented on all virtual
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* hardware. We can do some unfilled processing with index
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* translation, but otherwise need the draw module:
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*/
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if (fill != PIPE_POLYGON_MODE_FILL &&
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(templ->flatshade ||
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templ->light_twoside ||
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offset)) {
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fill = PIPE_POLYGON_MODE_FILL;
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
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rast->need_pipeline_tris_str = "unfilled primitives with no index manipulation";
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}
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/* If we are decomposing to lines, and lines need the pipeline,
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* then we also need the pipeline for tris.
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*/
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if (fill == PIPE_POLYGON_MODE_LINE &&
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(rast->need_pipeline & SVGA_PIPELINE_FLAG_LINES)) {
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fill = PIPE_POLYGON_MODE_FILL;
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
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rast->need_pipeline_tris_str = "decomposing lines";
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}
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/* Similarly for points:
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*/
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if (fill == PIPE_POLYGON_MODE_POINT &&
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(rast->need_pipeline & SVGA_PIPELINE_FLAG_POINTS)) {
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fill = PIPE_POLYGON_MODE_FILL;
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rast->need_pipeline |= SVGA_PIPELINE_FLAG_TRIS;
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rast->need_pipeline_tris_str = "decomposing points";
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}
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if (offset) {
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rast->slopescaledepthbias = templ->offset_scale;
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rast->depthbias = templ->offset_units;
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}
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rast->hw_fillmode = fill;
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}
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if (rast->need_pipeline & SVGA_PIPELINE_FLAG_TRIS) {
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/* Turn off stuff which will get done in the draw module:
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*/
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rast->hw_fillmode = PIPE_POLYGON_MODE_FILL;
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rast->slopescaledepthbias = 0;
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rast->depthbias = 0;
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}
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if (0 && rast->need_pipeline) {
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debug_printf("svga: rast need_pipeline = 0x%x\n", rast->need_pipeline);
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debug_printf(" pnts: %s \n", rast->need_pipeline_points_str);
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debug_printf(" lins: %s \n", rast->need_pipeline_lines_str);
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debug_printf(" tris: %s \n", rast->need_pipeline_tris_str);
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}
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if (svga_have_vgpu10(svga)) {
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rast->id = svga_define_rasterizer_object(svga, rast, 0);
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if (rast->id == SVGA3D_INVALID_ID) {
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svga_context_flush(svga, NULL);
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rast->id = svga_define_rasterizer_object(svga, rast, 0);
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assert(rast->id != SVGA3D_INVALID_ID);
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}
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}
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if (svga_have_gl43(svga)) {
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/* initialize the alternate rasterizer state ids.
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* For 0 and 1 sample count, we can use the same rasterizer object.
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*/
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rast->altRastIds[0] = rast->altRastIds[1] = rast->id;
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for (unsigned i = 2; i < ARRAY_SIZE(rast->altRastIds); i++) {
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rast->altRastIds[i] = SVGA3D_INVALID_ID;
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}
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}
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if (templ->poly_smooth) {
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util_debug_message(&svga->debug.callback, CONFORMANCE,
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"GL_POLYGON_SMOOTH not supported");
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}
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svga->hud.num_rasterizer_objects++;
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SVGA_STATS_COUNT_INC(svga_screen(svga->pipe.screen)->sws,
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SVGA_STATS_COUNT_RASTERIZERSTATE);
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return rast;
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}
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static void
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svga_bind_rasterizer_state(struct pipe_context *pipe, void *state)
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{
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struct svga_context *svga = svga_context(pipe);
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struct svga_rasterizer_state *raster = (struct svga_rasterizer_state *)state;
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if (!raster || !svga->curr.rast) {
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svga->dirty |= SVGA_NEW_STIPPLE | SVGA_NEW_DEPTH_STENCIL_ALPHA;
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}
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else {
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if (raster->templ.poly_stipple_enable !=
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svga->curr.rast->templ.poly_stipple_enable) {
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svga->dirty |= SVGA_NEW_STIPPLE;
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}
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if (raster->templ.rasterizer_discard !=
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svga->curr.rast->templ.rasterizer_discard) {
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svga->dirty |= SVGA_NEW_DEPTH_STENCIL_ALPHA;
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}
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}
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svga->curr.rast = raster;
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svga->dirty |= SVGA_NEW_RAST;
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}
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static void
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svga_delete_rasterizer_state(struct pipe_context *pipe, void *state)
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{
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struct svga_context *svga = svga_context(pipe);
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struct svga_rasterizer_state *raster =
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(struct svga_rasterizer_state *) state;
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/* free any alternate rasterizer state used for point sprite */
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if (raster->no_cull_rasterizer)
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svga_delete_rasterizer_state(pipe, (void *)(raster->no_cull_rasterizer));
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if (svga_have_vgpu10(svga)) {
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SVGA_RETRY(svga, SVGA3D_vgpu10_DestroyRasterizerState(svga->swc,
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raster->id));
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if (raster->id == svga->state.hw_draw.rasterizer_id)
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svga->state.hw_draw.rasterizer_id = SVGA3D_INVALID_ID;
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util_bitmask_clear(svga->rast_object_id_bm, raster->id);
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}
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FREE(state);
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svga->hud.num_rasterizer_objects--;
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}
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void
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svga_init_rasterizer_functions(struct svga_context *svga)
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{
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svga->pipe.create_rasterizer_state = svga_create_rasterizer_state;
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svga->pipe.bind_rasterizer_state = svga_bind_rasterizer_state;
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svga->pipe.delete_rasterizer_state = svga_delete_rasterizer_state;
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}
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