Tomeu Vizoso
8872f5eea4
ethosu: Add debug option for forcing U85 generation
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:56 +00:00
Tomeu Vizoso
45fb8b99df
ethosu: Invert lowering order of concatenation suboperations
...
Just so we match the order in which Vela assigns offsets to the FMs so
it's easier to diff cmdstream dumps.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:56 +00:00
Tomeu Vizoso
d66d2c05d3
ethosu: Switch to the weight encoder from Regor
...
We vendor the encoder used in the Regor compiler in Vela, and replace
the previous one that was used by the Python compiler and doesn't
support U85.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:55 +00:00
Tomeu Vizoso
410d74e078
ethosu: Compute is_partkernel during scheduling
...
As we need it for encoding the weights.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:55 +00:00
Tomeu Vizoso
3ade0a4dd6
ethosu: Make the UBlock sizes arch-specific
...
As U85 has a different configuration.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:55 +00:00
Tomeu Vizoso
91137a9327
ethosu: Let maxblockdeps be arch-specific
...
As U85 can have up to 7.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:54 +00:00
Tomeu Vizoso
0af37552a7
ethosu: Add U85 fields, these are compatible with the U65
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:54 +00:00
Tomeu Vizoso
4388f602ed
teflon: Fix leak of tensor structs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:53 +00:00
Tomeu Vizoso
47aa30276e
ethosu: Update test expectations
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39611 >
2026-03-23 07:45:53 +00:00
Marek Olšák
533b962b29
driconf: rename sha1 option to blake3
...
it's already blake3 except the name
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
94bcf968f4
driconf: unbreak profiles for "runner" by merging them and ignoring sha1s
...
SHA1 is no longer supported.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
89a97d4ce1
Change remaining SHA-1 occurences to BLAKE3
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
fa5175023b
Final rename of sha1 names to blake3
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
ae9ea27e0d
Rename *_sha1 names to *_blake3
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
353fe94c0e
Rename SHA1 words to BLAKE3
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
102d41799b
Rename more sha and sha1 names to blake3
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
282bd2e6db
Rename sha words to blake3
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
d4831aaf5f
Rename sha1_* and sha_* names to blake3_*
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
0877be34f5
Rename SHA1_* names to BLAKE3_*
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:28 +00:00
Marek Olšák
e9ca8fccab
util: rename the sha1 test to blake3 test
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
c0ac992a2a
Remove mesa-sha1.h
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
53c64973e8
Inline _mesa_sha1_compute/format, remove the other unused ones
...
_mesa_sha1_format has a few remaining uses, so it's moved to build_id.c,
which is its last user.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
52d5dfc7d3
Remove redundant BLAKE3_KEY_LEN32
...
it's the same number as BLAKE3_OUT_LEN32
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
699f9d7066
Inline _mesa_sha1_init/update/final functions
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
3ae8f910ad
Inline SHA1* functions, remove sha1.h
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
a965ada6ee
Inline mesa_sha1, SHA1_CTX
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
0da88d237a
Inline SHA1_DIGEST_STRING_LENGTH
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
110632f702
Inline SHA1_DIGEST_LENGTH
...
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383 >
2026-03-23 07:03:27 +00:00
Marek Olšák
2283244975
nir: change export_amd intrinsics to use target instead of base
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40415 >
2026-03-23 06:10:49 +00:00
Marek Olšák
b75a3112fd
nir: change export_amd intrinsics to use enabled_channels instead of write_mask
...
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40415 >
2026-03-23 06:10:49 +00:00
Zan Dobersek
e7f6c8ab7e
fd: make RD dump output path configurable through FD_RD_DUMP_PATH
...
Allow adjusting the location of RD dumps and trigger file through the
FD_RD_DUMP_PATH environment variable. When not present, the existing
defaults will be used.
Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40532 >
2026-03-22 11:03:04 +00:00
Eric Engestrom
8c4e6aa4c0
docs: delete now-unused html_redirects extension
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40559 >
2026-03-22 10:25:39 +01:00
Eric Engestrom
2b5889697d
docs: replace html redirects with http redirects
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40559 >
2026-03-22 10:25:29 +01:00
Eric Engestrom
d81a70b3af
docs: fix various pep8 issues
...
Missing second empty lines between top-level classes/functions,
spurious/unnecessary newlines, unused imports... just bunch of trivial
and non-controversial stuff.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40558 >
2026-03-22 09:48:57 +01:00
Marek Olšák
f9a10c46fa
nir/inline_uniforms: track visited state per component
...
This prevents an instruction from being marked inlinable or non-inlinable
when only a subset of components meet that condition.
This might only be relevant for non-scalar ALU.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40413 >
2026-03-21 17:55:40 +00:00
Marek Olšák
d9a2fac925
nir/inline_uniforms: update comments
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40413 >
2026-03-21 17:55:40 +00:00
Marek Olšák
3b004ec60b
nir/inline_uniforms: rename new_num -> new_num_uniforms
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40413 >
2026-03-21 17:55:39 +00:00
Marek Olšák
727d663f79
nir/inline_uniforms: rename num_offsets -> num_uniforms
...
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40413 >
2026-03-21 17:55:39 +00:00
pal1000
718afd787c
clc: Fix static link with clang>=22
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15090
Backport-to: 26.0
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Rudi Heitbaum <rudi@heitbaum.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40549 >
2026-03-21 12:36:22 +00:00
Timothy Arceri
06fc27b5a4
nir: test loop analyze sets exact trip flags correctly
...
Introduces new test helper to create loop with multiple terminators
and tests some scenaros to make sure exact trip flags are set
correctly.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32473 >
2026-03-21 11:46:14 +00:00
Timothy Arceri
82b474c3fb
nir: remove is_only_uniform_src() restriction
...
Loop analysis seems to have assumed we needed a const here to be
a useful loop, however this isn't true so drop the restriction.
This allows the optimisation from 6ca81adffc to become more powerful.
Shader-db results radeonsi:
TOTALS FROM AFFECTED SHADERS (19/168079)
SGPRS: 904.00 -> 848.00 (-6.19 %)
VGPRS: 712.00 -> 684.00 (-3.93 %)
Spilled SGPRs: 0.00 -> 0.00 (0.00 %)
Spilled VGPRs: 0.00 -> 0.00 (0.00 %)
Private memory VGPRs: 0.00 -> 0.00 (0.00 %)
Scratch size: 0.00 -> 0.00 (0.00 %) dwords per thread
Code Size: 80340.00 -> 92980.00 (15.73 %) bytes
Max Waves: 236.00 -> 238.00 (0.85 %)
Outputs: 0.00 -> 0.00 (0.00 %)
Patch Outputs: 0.00 -> 0.00 (0.00 %)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32473 >
2026-03-21 11:46:14 +00:00
Rob Herring (Arm)
6b26cc2df3
ethosu: Fix buffer overrun in stridedslice
...
The slice.begin array length matches the tensor depth which may be less
than 4.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:20 +00:00
Rob Herring (Arm)
5e93ab5477
ethosu: Support ReLU activation for ADD ops
...
ReLU activations require the minimum to be set to the zero point.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:20 +00:00
Rob Herring (Arm)
69d1da3518
teflon: Support ReLU activation for ADD ops
...
ADD operations can have fused ReLU activations. Add the setting to the
operation state.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:20 +00:00
Rob Herring (Arm)
3780fb8494
ethosu: Handle IFM2 H/W/D broadcast
...
If the IFM and IFM2 dimensions are not the same, then the H/W/D broadcast
needs to be enabled.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:20 +00:00
Rob Herring (Arm)
1cb46e9304
ethosu: Handle reversing IFM and IFM2 operands
...
IFM2 must be scalar or smaller than IFM. If not, then the operands need
to be swapped.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:19 +00:00
Rob Herring (Arm)
d962160e95
ethosu: Add scalar ADD support
...
An input tensor can contain a single scalar value to add to the IFM.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:19 +00:00
Rob Herring (Arm)
5606fd1ea6
ethosu: Add support for 16-bit tensors
...
Ethos-U can support 16-bit tensors. So far the driver just assumed 8-bit
tensors.
There's a few cases where 32-bit tensors are supported, but exactly what
those are hasn't been determined, so just reject them for now.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:19 +00:00
Rob Herring (Arm)
7613788f06
teflon: Add support for setting the tensor type size
...
Drivers supporting different element sizes need to know the element type
size.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:18 +00:00
Rob Herring (Arm)
c29860e9e9
test_teflon: Add 32-bit integer output comparison
...
Add support for 32-bit integer output comparison. This fixes several
test failures for movenetlightning and movenetthunder.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40525 >
2026-03-21 08:32:18 +00:00